SY100S863

The SY100S863 is a PECL 8:1 multiplexer designed for use in new, high-performance PECL systems.The SY100S863 has differential PECL outputs and a standard TTL output. The TTL select inputs (SEL0, SEL1, SEL2) determine which one of the eight differential PECL data inputs (D0D7) is propagated to the outputs. The enable pin of SY100S863, EN, is provided for expansion. When EN is at a TTL logic one level, both PECL and TTL outputs are enabled. When the enable pin is set to TTL logic zero level, both PECL outputs of the differential pair are in cut-off and the TTL output is in a three-state condition.