DescriptionThe SY10/100E171 offer three 4:1 multiplexers with differential outputs, designed for use in new, high-performance ECL systems. The leading 4-bit multiplexer operation is organized pairwise, with each pair being a 2-bit multiplexer. Separate select (SEL1A, SEL1B) controls are provided w...
SY10/100E171: DescriptionThe SY10/100E171 offer three 4:1 multiplexers with differential outputs, designed for use in new, high-performance ECL systems. The leading 4-bit multiplexer operation is organized pairwi...
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DescriptionThe SY10/100E111 are low skew 1-to-9 differential drivers designed for clock distributi...
The SY10/100E171 offer three 4:1 multiplexers with differential outputs, designed for use in new, high-performance ECL systems. The leading 4-bit multiplexer operation is organized pairwise, with each pair being a 2-bit multiplexer. Separate select (SEL1A, SEL1B) controls are provided within each pair. The SY10/100E171 signals control the leading multiplexers, while the SEL2 signal controls the output multiplexer. The three select signals can be used to determine which of the four data inputs will be propagated to the corresponding outputs.