Features: 3.3V and 5V power supply options Up to 2.5Gbps operation Low noise Chatter-fee signal detect (SD) generation Open collector TTL signal detect (SD) output TTL EN input Differential PECL inputs for data Single power supply Designed for use with Micrel-Synergy laser diode driver and control...
SY88943V: Features: 3.3V and 5V power supply options Up to 2.5Gbps operation Low noise Chatter-fee signal detect (SD) generation Open collector TTL signal detect (SD) output TTL EN input Differential PECL inp...
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| Symbol | Parameter | Rating | Unit |
| VCC | Power Supply Voltage | 0 to +7 | V |
| DIN, /DIN | Input Voltage | 0 to VCC | V |
| DOUT, /DOUT | Output Voltage (with 50 load) | VCC 2.5, VCC +0.3 | V |
| EN | Input Voltage | 0 to VCC | V |
| SDLVL | Input Voltage | 0 to VCC | V |
| VREF | Output Voltage | VCC 2.0 to VCC | V |
| TA | Operating Temperature Range | -40 to +85 | °C |
| Tstore | Storage Temperature Range | 55 to +125 | °C |
The SY88943V limiting post amplifier with its high gain and wide bandwidth is ideal for use as a post amplifier in fiber-optic receivers with data rates up to 2.5Gbps. Signals as small as 5mVp-p can be amplified to drive devices with PECL inputs. The SY88943V generates a chatter-free Signal Detect (SD) open collector TTL output. The SY88943V incorporates a programmable level detect function to identify when the input signal has been lost.
The SD output will change from logic "HIGH" to logic "LOW" when input signal is smaller than the swing set by SDLVL. This information can be fed back to the EN input of the SY88943V to maintain stability under loss of signal condition. Using SDLVL pin, the sensitivity of the level detection can be adjusted. The SDLVL voltage can be set by connecting a resistor divider between VCC and VREF as shown in Figure 3. Figure 4, 5, 6, and 7 show the relationship between input level sensitivity and the voltage set on SDLVL.The SD output is a TTL open collector output that requires a pull-up resistor for proper operation, Figure 1.