Si3220

Features: 􀂄` Performs all BORSCHT functions􀂄` Ideal for applications up to 18 kft􀂄` Internal balanced ringing to 65 Vrms (Si3220)􀂄` External bulk ringer support (Si3225)􀂄` Software-programmable parameters:􀁺` Ringing frequency, amplitude, cadenc...

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SeekIC No. : 004490110 Detail

Si3220: Features: 􀂄` Performs all BORSCHT functions􀂄` Ideal for applications up to 18 kft􀂄` Internal balanced ringing to 65 Vrms (Si3220)􀂄` External bulk ringer support (...

floor Price/Ceiling Price

Part Number:
Si3220
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/25

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Product Details

Description



Features:

􀂄` Performs all BORSCHT functions
􀂄` Ideal for applications up to 18 kft
􀂄` Internal balanced ringing to 65 Vrms (Si3220)
􀂄` External bulk ringer support (Si3225)
􀂄` Software-programmable parameters:
􀁺` Ringing frequency, amplitude, cadence, and waveshape (Si3220) 􀁺 Two-wire ac impedance
􀁺` Transhybrid balance
􀁺` DC current loop feed (1845 mA)
􀁺` Loop closure and ring trip thresholds
􀁺` Ground key detect threshold
􀂄` Automatic switching of up to three battery supplies
􀂄` On-hook transmission
􀂄` Loop or ground start operation with smooth/abrupt polarity reversal
􀂄` Modem/fax tone detection
􀂄` DTMF generation/decoding
􀂄` Dual tone generators
􀂄` A-Law/-Law, linear PCM companding
􀂄` PCM and SPI bus digital interfaces with programmable interrupts
􀂄` GCI mode support
􀂄` 3.3 or 5 V operation
􀂄` GR-909 loop diagnostics
􀂄` Audio diagnostics with loopback
􀂄` 12 kHz/16 kHz pulse metering (Si3220)
􀂄` FSK caller ID generation
􀂄` Lead-free/RoHS-compliant



Application

􀂄· Digital loop carriers
􀂄· Central Office telephony
􀂄· Pair gain remote terminals
􀂄· Wireless local loop
􀂄· Private Branch Exchange (PBX) systems
􀂄· Cable telephony
􀂄· Voice over IP/voice over DSL
􀂄· ISDN terminal adapters



Specifications

Parameter Symbol Test
Condition
Value Unit
Supply Voltage, Si3200 and Si3220/Si3225 VDD, VDD1VDD4   0.5 to 6.0 V
High Battery Supply Voltage, Si32002 VBATH Continuous 0.4 to 104 V
10 ms 0.4 to 109
Low Battery Supply Voltage, Si3200 VBAT,VBATL Continuous VBATH V
TIP or RING Voltage, Si3205 VTIP,VRING Continuous
Pulse < 10 s
Pulse < 4 s
104
VBATH 15
VBATH 35
 
TIP, RING Current, Si3200 ITIP, IRING   ±100 mA
STIPAC, STIPDC, SRINGAC, SRINGDC Current,
Si3220/Si3225
    ±20 mA
Input Current, Digital Input Pins IIN Continuous ±10 mA
Si3220/25 Analog Ground Differential Voltage
(GND1 to ePad, GND2 to ePad, or GND1 to GND2)3
VGNDA   ±50 mV
Si3220/25 Digital Ground Differential Voltage (GND3
to GND4)3
VGNDD   ±50 mV
Si3220/25 Analog to Digital Ground Differential Voltage
(GND1/GND2/ePad to GND3/GND4)3
VGND,AD   ±200 mV
Digital Input Voltage VIND   0.3 to (VDDD + 0.3) V
Operating Temperature Range TA   40 to 100 °C
Storage Temperature Range TSTG   40 to 150 °C
Si3220/Si3225 Thermal Resistance,
Typical3 (TQFP-64 ePad)
JA   25 °C/W
Si3200 Thermal Resistance, Typical4
(SOIC-16 ePad)
JA   55 °C/W
Continuous Power Dissipation, Si32005 PD TA = 85 °C,
SOIC-16
1 W
Continuous Power Dissipation, Si3220/25 PD TA = 85 °C,
TQFP-64
1.6 W

Notes:
1. Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2. The dv/dt of the voltage applied to the VBAT, VBATH, and VBATL pins must be limited to 10 V/s.
3. The PCB pad placed under the device package must be connected with multiple vias to the PCB ground layer and to the GND1-GND4 pins via short traces. The TQFP-64 e-Pad must be properly soldered to the PCB pad during PCB assembly. This type of low-impedance grounding arrangement is necessary to ensure that maximum differentials are not exceeded under any operating condition in addition to providing thermal dissipation.
4. The thermal resistance of an exposed pad package is assured when the recommended printed circuit board layout
guidelines are followed correctly. The specified performance requires that the exposed pad be soldered to an  xposed copper surface of equal size and that multiple vias are added to enable heat transfer between the top-side copper surface and a large internal copper ground plane. Refer to "AN55: Dual ProSLIC® User Guide" or to the i3220/3225 evaluation board data sheet for specific layout examples.
5. On-chip thermal limiting circuitry will shut down the circuit at a junction temperature of approximately 150 °C. For optimal reliability, junction temperatures above 140 °C should be avoided.




Description

The Dual ProSLIC® is a series of low-voltage CMOS devices that integrate both SLIC and codec functionality into a single IC to provide a complete dual-channel analog telephone interface in accordance with all relevant LSSGR, ITU, and ETSI specifications. The Si3220 includes internal ringing generation to eliminate centralized ringers and ringing relays, and the Si3225 supports centralized ringing for long loop and legacy applications. On-chip subscriber loop and audio testing allows remote diagnostics and fault detection with no external test equipment or relays. The Si3220 and Si3225 operate from a single 3.3 or 5 V supply and interface to standard PCM/SPI or GCI bus digital interfaces. The Si3200 linefeed interface IC performs all high-voltage functions and operates from a 3.3 V or 5 V supply as well as single or dual battery supplies up to 100 V. The Si3220 and Si3225 are available in a 64-pin thin quad flat package (TQFP), and the Si3200 is available in a thermally-enhanced 16-pin small outline (SOIC) package.




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