Si5318

Note: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional  peration should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

The Si5318 is a precision clock multiplier designed to exceed the requirements of high-speed communication systems, including OC-48. The device phase locks to an input clock in the 19, 39, 78, or 155 MHz frequency range and generates a low jitter output clock in the 19 or 155 MHz range. Silicon Laboratories' DSPLL^® technology delivers all PLL functionality with unparalleled performance while eliminating external loop filter components, providing programmable loop parameters, and simplifying design. The Si5318 establishes a new standard in performance and integration for ultra-low-jitter clock generation. It operates from a single 3.3 V supply.