Si5321

Features: 􀂄· Ultra-low jitter clock output with jitter generation as low as 0.3 psRMS􀂄· No external components (other than a resistor and bypassing)􀂄· Input clock ranges at 19, 39, 78, 155,311, or 622 MHz􀂄· Output clock ranges at 19, 39, 78, 155,311, 622, 1244, ...

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SeekIC No. : 004490454 Detail

Si5321: Features: 􀂄· Ultra-low jitter clock output with jitter generation as low as 0.3 psRMS􀂄· No external components (other than a resistor and bypassing)􀂄· Input clock ranges a...

floor Price/Ceiling Price

Part Number:
Si5321
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/25

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Product Details

Description



Features:

􀂄· Ultra-low jitter clock output with jitter generation as low as 0.3 psRMS
􀂄· No external components (other than a resistor and bypassing)
􀂄· Input clock ranges at 19, 39, 78, 155,311, or 622 MHz
􀂄· Output clock ranges at 19, 39, 78, 155,311, 622, 1244, or 2488 MHz
􀂄· Maximum range includes 693 MHz for 10 GbE FEC support
􀂄· Digital hold for loss-of-input clock
􀂄· Support for 255/238 (15/14),255/237 (85/79), and 66/64 FEC scaling (ITU-T G.709 and IEEE 802.3ae)
􀂄· Selectable loop bandwidth
􀂄· Loss-of-signal alarm output
􀂄· Low power
􀂄· Small size (9x9 mm)
􀂄· Backwards compatible with Si5320



Application

􀂄· SONET/SDH line/port cards
􀂄· Terabit routers
􀂄· Core switches
􀂄· Digital cross connects



Specifications

Parameter Symbol Value Unit
3.3 V DC Supply Voltage VDD33 0.5 to 3.6 V
LVTTL Input Voltage VDIG 0.3 to (VDD33 + 0.3) V
Maximum Current any output PIN   ±50 mA
Operating Junction Temperature TJCT 55 to 150
Storage Temperature Range TSTG 55 to 150
ESD HBM Tolerance (100 pf, 1.5 k)   1.0 kV

Note: Permanent device damage may occur if the Absolute Maximum Ratings are exceeded. Functional operation hould be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.




Description

The Si5321 is a precision clock multiplier that exceeds the requirements of high-speed communication systems, including OC-192/OC-48 and 10 Gigabit Ethernet. This device phase locks to an input clock in the 19, 39, 78, 155, 311 or 622 MHz frequency range and generates a frequency-multiplied clock output that can be configured for operation in the 19, 39, 78, 155, 622, 1244, or 2488 MHz frequency range. Silicon Laboratories DSPLL™ technology provides PLL functionality with unparalleled performance. It eliminates external loop filter components, provides programmable loop parameters,and simplifies design. FEC rates are supported by selectable forward and reverse 255/238 (15/14), 255/237 (85/79), and 66/64 (33/32) conversion factors. The ITU-T G.709 255/237 rate and the IEEE 802.3ae 66/64 rate are supported when using a 155 MHz or higher rate input clock. The performance and integration of Silicon Laboratories' Si5321 clock IC provides high-level support of the latest specifications and systems. It operates from a single 3.3 V supply.




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