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T7503

Features: ` +5 V only` Automatic powerdown mode` Low-power, latch-up-free CMOS technology` On-chip sample and hold, autozero, and precisionvoltage reference` Differential architecture for high noise immunity and power supply rejection` Automatic master clock frequency selection` 2.048 MHz or 4.096...

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SeekIC No. : 004511476 Detail

T7503: Features: ` +5 V only` Automatic powerdown mode` Low-power, latch-up-free CMOS technology` On-chip sample and hold, autozero, and precisionvoltage reference` Differential architecture for high noise...

T7503 Data Sheet

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Part Number:
T7503
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/27

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Product Details

Description



Features:

` +5 V only 
` Automatic powerdown mode 
` Low-power, latch-up-free CMOS technology
` On-chip sample and hold, autozero, and precisionvoltage reference
` Differential architecture for high noise immunity and power supply rejection
` Automatic master clock frequency selection 
` 2.048 MHz or 4.096 MHz fixed data rate
` Frame sync controlled channel swapping 
` Differential analog I/O 
` 300W output drivers 
` Operating temperature range: 40°C to +85°C
` m-law companding


Application

· Speakerphone
 
· Telephone answering device (TAD)
 
· POTS for ISDN




Pinout

Connection Diagram


Specifications

Parameter
Symbol
Min
Max
Unit
Storage Temperature Range
Tstg
55
150
°C
Power Supply Voltage
VDD
  
6.5
V
Voltage on Any Pin with Respect to Ground
0.5
0.5 + VDD
V
Maximum Power Dissipation (package limit)
PD
600
mW

Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of this data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability.




Description

The T7503 device is a single-chip, two-channel m-law PCM codec with filters. This integrated circuit provides analog-to-digital and digital-to-analog conversion. It provides the transmit and receive filtering necessary to interface a voice telephone circuit to a time-division multiplexed (TDM) system. The device features a differential transmit amplifier, and the power receive amplifier is capable of driving 600W differentially. PCM timing is defined by a single frame sync pulse. This device operates in a delayed timing mode (digital data is valid one clock cycle after frame sync goes high). The T7503 is packaged in a 20-pin SOJ.




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