T80C5112

The T80C5112 is a high performance ROM/OTP versionof the 80C51 8-bit microcontroller.

The T80C5112 retains all the features of the standard80C51 with 8 Kbytes ROM/OTP program memory, 256bytes of internal RAM, a 8-source , 4-level interruptsystem, an on-chip oscillator and two timer/counters.

The T80C5112 is dedicated for analog interfacingapplications. For this, it has an 10-bit, 8 channels A/Dconverter and a five channels Programmable CounterArray.

In addition, the T80C5112 has a Hardware WatchdogTimer with its own low power oscillator, a versatileserial channel that facilitates multiprocessorcommunication (EUART) with an independent baud rategenerator, a SPI serial bus controller and a X2 speedimprovement mechanism. The X2 feature allows to keepthe same CPU power at a divided by two oscillatorfrequency.

The fully static design of the T80C5112 allows to reducesystem power consumption by bringing the clockfrequency down to any value, even DC, without loss ofdata.

The T80C5112 has 3 software-selectable modes ofreduced activity for further reduction in powerconsumption. In the idle mode the CPU is frozen whilethe peripherals are still operating. In the quiet mode, theA/D converter only is operating. In the power-downmode the RAM is saved and all other functions areinoperative. Two oscillators source, crystal and RC,provide a versatile power management.

The T80C5112 is proposed in 48/52 pin count packageswith Port 0 and Port 2 (address / data busses).