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TA235

Features: · a five Signal Communication Interface (FWH0-FWH4) to support the Read and Write operations, · five General Purpose Inputs (FGPI0-FGPI4) for platform design flexibility, · four Identification Inputs (ID0-ID3) to address · up to 16 different memory devices, · a Register Based Block Locki...

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SeekIC No. : 004511844 Detail

TA235: Features: · a five Signal Communication Interface (FWH0-FWH4) to support the Read and Write operations, · five General Purpose Inputs (FGPI0-FGPI4) for platform design flexibility, · four Identifica...

TA235 Data Sheet

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Part Number:
TA235
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

· a five Signal Communication Interface (FWH0-FWH4) to support the Read and Write  operations,
· five General Purpose Inputs (FGPI0-FGPI4) for  platform design flexibility,
· four Identification Inputs (ID0-ID3) to address
· up to 16 different memory devices,
· a Register Based Block Locking and a  Hardware Block Protection for firmware  security.


Pinout

Connection Diagram


Description

The TA235 uses a chip-set containing two controllers, called the North Bridge and the South Bridge. Intel replaces these with the Hub. In the Hub Architecture the two controllers are connected to each other via a new Interlink dedicated bus. This is a high-speed bus that has twice the bandwidth of the PCI bus that works at  266 MBytes per second and resembles the new point-to-point channel. The new Intel PC platforms incorporate three primary components:




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