Features: · 10-bit resolution· 3.0 to 5.25 V operation· Sampling rate up to 20 MHz· DC sampling allowed· High signal-to-noise ratio over a large analog input frequency range (9.3 effective bits at 1.0 MHz; full-scale input at fclk = 20 MHz)· In-Range (IR) CMOS output· CMOS/TTL compatible digital i...
TDA8766: Features: · 10-bit resolution· 3.0 to 5.25 V operation· Sampling rate up to 20 MHz· DC sampling allowed· High signal-to-noise ratio over a large analog input frequency range (9.3 effective bits at 1...
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| Symbol | Parameter | Conditions | Min | Typ | Max | Unit |
| VCCA | analog supply voltage | 3.0 | 3.3 | 5.25 | V | |
| VDDD1 | digital supply voltage 1 | 3.0 | 3.3 | 5.25 | V | |
| VDDD2 | digital supply voltage 2 | 3.0 | 3.3 | 5.25 | V | |
| VDDO | output stages supply voltage | 3.0 | 3.3 | 5.25 | V | |
| IDDA | analog supply current | 7.5 | 10 | mA | ||
| IDDD | digital supply current | 7.5 | 10 | mA | ||
| IDDO | output stages supply current | fclk = 20 MHz; CL = 20 pF; ramp input |
1 | 2 | mA | |
| INL | integral non-linearity | fclk = 20 MHz; ramp input | ±1 | ±2 | LSB | |
| DNL | differential non-linearity |
fclk = 20 MHz; ramp input | ±0.25 | ±0.7 | LSB | |
| fCLK(max) | maximum clock frequency | 20 | MHz | |||
| Ptot | total power dissipation | VDDA = VDDD = VDDO = 3.3 V | 53 | 73 | mW |
The TDA8766 is a 10-bit high-speed Analog-to-Digital Converter (ADC) for professional video and other applications. It converts with 3.0 to 5.25 V operation the analog input signal into 10-bit binary-coded digital words at a maximum sampling rate of 20 MHz. All digital inputs and outputs are CMOS compatible. A standby mode allows reduction of the device power consumption down to 4 mW.