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TH58NS512DC

Features: • Organization Memory cell array 528 × 64K × 8 × 2 Register 528 × 8 Page size 528 bytes Block size (16K + 512) bytes• Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read• Mode control Serial input/output, Command control• Complies with the SmartMed...

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SeekIC No. : 004518546 Detail

TH58NS512DC: Features: • Organization Memory cell array 528 × 64K × 8 × 2 Register 528 × 8 Page size 528 bytes Block size (16K + 512) bytes• Modes Read, Reset, Auto Page Program, Auto Block Erase, St...

TH58NS512DC Data Sheet

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Part Number:
TH58NS512DC
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Organization
   Memory cell array      528 × 64K × 8 × 2
   Register                    528 × 8
   Page size                  528 bytes
   Block size                  (16K + 512) bytes
• Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read
• Mode control Serial input/output, Command control
• Complies with the SmartMediaTM Electrical Specification and Data Format Specification issued by the SSFDC Forum
• Power supply VCC = 3.3 V ± 0.3 V
• Access time Cell array-register 25 µs max Serial Read cycle 80 ns min
• Operating current
   Read (80-ns cycle)           10 mA typ.
   Program (avg.)                10 mA typ.
   Erase (avg.)                    10 mA typ.
   Standby                          100 µA max
• Packages TH58NS512DC: FDC-22C (Weight: 2.2 g typ.)


Pinout

Connection Diagram


Specifications

SYMBOL
PARAMETER
RATING
Unit
VCC
 Power Supply Voltage
−0.6~4.6
V
VIN
 Input Voltage
−0.6~4.6
V
VI/O
 Input/Output Voltage
−0.6 V~VCC + 0.3 V ( 4.6 V)
V
PD
 Power Dissipation
0.3
W
Tstg
 Storage Temperature
−20~65
Topr
 Operating Temperature
0~55




Description

The TH58NS512DC is a single 3.3-V 512-Mbit (553,648,128) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes × 32 pages × 4096 blocks. The TH58NS512DC has a 528-byte static register which allows program and read data to be transferred between the register and the memory cell array in 528-byte increments. The Erase operation is implemented in a single block unit (16 Kbytes + 512 bytes: 528 bytes × 32 pages).

The TH58NS512DC is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs. The Erase and Program operations are automatically executed.

The TH58NS512DC is a SmartMediaTM with ID and each device has 128 bit unique ID number embedded in the device. This unique ID number is applicable to image files, music files, electronic books, and so on where copyright protection is required.

The data stored in the TH58NS512DC needs to comply with the data format standardized by the SSFDC Forum in order to maintain compatibility with other SmartMediaTM systems.




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