THS10064

Simultaneous Sampling of 4 Single-Ended Signals or 2 Differential Signals or Combination of Both
Integrated 16-Word FIFO
Signal-to-Noise and Distortion Ratio: 59 dBat f_I = 2 MHz
Differential Nonlinearity Error: ±1 LSB
Integral Nonlinearity Error: ±1 LSB
Auto-Scan Mode for 2, 3, or 4 Inputs
3-V or 5-V Digital Interface Compatible
Low Power: 216 mW Max
5-V Analog Single Supply Operation
Internal Voltage References . . . 50 PPM/°Cand ±5% Accuracy
Parallel mC/DSP Interface

Supply voltage range, DGND to DV_DD . . . . . . . . . . . . . . . . 0.3 V to 6.5 V
BGND to BV_DD  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 6.5 V
AGND to AV_DD  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.3 V to 6.5 V
Analog input voltage range AGND  . . . . . . . . . . . . . . . . . . 0.3 V to AV_DD + 1.5 V
Reference input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 + AGND to AV_DD + 0.3 V
Digital input voltage range . . . . . . . . . . . . . . . . . . . . . . 0.3 V to BVDD/DV_DD + 0.3 V
Operating virtual junction temperature range, TJ  . . . . . . . . .40°C to 150°C
Operating free-air temperature range,TA THS10064C  . . . . . . .0°C to 70°C
THS10064I  . . . . . . . . . . . . . . . . . . . . . . . . . . . .40°C to 85°C
Storage temperature range, Tstg  . . . . . . . . . . . . . . . . . . .65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds  . . . . . . . . . .260°C

The THS10064 is a CMOS, low-power, 10-bit, 6 MSPS analog-to-digital converter (ADC). The speed, resolution, bandwidth, and single-supply operation of THS10064 are suited for applications in radar, imaging, high-speed acquisition, and communications. A multistage pipelined architecture with output error correction logic provides for no missing codes over the full operating temperature range. Internal controlregisters are used to program the ADC into the desired mode. The THS10064 consists of four analog inputs, which are sampled simultaneously. These inputs can be selected individually and configured to single-ended or differential inputs. An integrated 16 word deep FIFO allows the storage of data in order to improve data transfers to the processor. Internal reference voltages for the ADC (1.5 V and 3.5 V) are provided.

An external reference of THS10064 can also be chosen to suit the dc accuracy and temperature drift requirements of the application. Two different conversion modes can be selected. In single conversion mode, a single and simultaneous conversion of up to four inputs can be initiated by using the single conversion start signal
(CONVST). The conversion clock in single conversion mode is generated internally using a clock oscillator circuit. In continuous conversion mode, an external clock signal is applied to the CONV_CLK input of the THS10064. The internal clock oscillator is switched off in continuous conversion mode.

The THS10064C is characterized for operation from 0°C to 70°C, and the THS10064I is characterized for operation from 40°C to 85°C.