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MFG:TI  Package Cooled:SOP16  

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Part Number: TL7770-5I

 

MFG: TI

Package Cooled: SOP16

 

Description: The TL7770 is an integrated-circuit system supervisor designed for use as a reset controller in microc...


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TL7770-5I General Description


The TL7770 is an integrated-circuit system supervisor designed for use as a reset controller in microcomputer and microprocessor power-supply systems. This device contains two independent supply-voltage supervisors that monitor the supplies for overvoltage and undervoltage conditions at the VSO and VSU terminals, respectively. When VCC attains the minimum voltage of 1 V during power up, the RESET output becomes active (low). As VCC approaches 3.5 V, the time-delay function activates, latching RESET and RESET active (high and low, respectively) for a time delay (td) after system voltages have achieved normal levels. Above VCC = 3.5 V, taking RESIN low activates the time-delay function during normal system-voltage levels. To ensure that the microcomputer system has reset, the outputs remain active until the voltage at VSU exceeds the threshold value, VIT+, for a time delay, which is determined by an external timing capacitor such that:

td  20*103*capacitance

where td is in seconds and capacitance is in farads.

The overvoltage-detection circuit is programmable for a wide range of designs. During an overvoltage condition, an internal silicon-controlled rectifier (SCR) is triggered, providing 250-mA peak instantaneous current and 25-mA continuous current to the SCR gate drive terminal, which can drive an external high-current SCR gate or an overvoltage-warning circuit.

The TL7770C series is characterized for operation from 0°C to 70°C. The TL7770I series is characterized for operation from 40°C to 85°C.

TL7770-5I Maximum Ratings

Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . .. . . . . . . . . . . . . . .. . . . . . . . . . .. . . 20 V
Input voltage range, VI: 1VSU, 2VSU, 1VSO, and 2VSO (see Note 1) . . . .  . . . 0.3 V to 18 V
Low-level output current (1RESET and 2RESET), IOL. . . . . . . . . . . .. . . . . . . . . . . . .  . . 20 mA
High-level output current (1RESET and 2RESET), IOH . . . . . . . . . . . . . . . . . . . . . . .  . .20 mA
Package thermal impedance, JA (see Notes 2 and 3): DW package. . . . . . . . . . .  . . 57°C/W 
                                                                                      N package. . . . . . . . . . . . . . . 88°C/W
Lead temperature 1,6 mm (1/16 in) from case for 10 seconds: DW or N package . . . . 260°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65°C to 150°C
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to the network ground terminal.
             2. Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) TA)/JA. Operating at the absolute maximum TJ of 150°C can impact reliability.
            3. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero.

TL7770-5I Connection Diagram

TL7770-5I  Connection Diagram

TL7770-5I datasheet

TL7770-5IDW
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