Features: ` Organization TM4EN64xPU-xx . . . 4194304 * 64 Bits TM8EN64xPU-xx . . . 8388608 * 64 Bits
` Single 3.3-V Power Supply (±10% Tolerance)
` JEDEC 168-Pin Dual-In-Line Memory Module (DIMM) Without Buffer for Use With Socket
` TM4EN64xPU-xx - Utilizes Four 64M-Bit High-Speed (4M*16-Bit) Dynamic RAMs
` TM8EN64xPU-xx - Utilizes Eight 64M-Bit High-Speed (4M*16-Bit) Dynamic RAMs
`High-Speed, Low-Noise LVTTL Interface
` High-Reliability 50-Lead 400-Mil-Wide Surface-Mount Thin Small-Outline Package (TSOP) (DGE Suffix)
` Long Refresh Periods: TMxEN64KPU: 64 ms (4096 Cycles) TMxEN64NPU: 64 ms (8192 Cycles)
` 3-State Output
` Extended-Data-Out (EDO) Operation With CAS-Before-RAS (CBR), RAS-Only, and Hidden Refresh
` Serial-Presence-Detect (SPD) Using EEPROM
` Ambient Temperature Range 0°C to 70°C
` Gold-Plated Contacts
` Performance Ranges ACCESS ACCESS ACCESS EDO TIME TIME TIME CYCLE tRAC tCAC tAA tHPC
(MAX) (MAX) (MAX) (MIN)
'xEN64xPU40 40 ns 11 ns 20 ns 16 ns
'xEN64xPU50 50 ns 13 ns 25 ns 20 ns
'xEN64xPU60 60 ns 15 ns 30 ns 25 ns
SpecificationsSupply voltage range, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Voltage range on any pin (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Short-circuit output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Power dissipation: TM4EN64xPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 W
TM8EN64xPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 W
Ambient temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to VSS.DescriptionThe TM16ER72HP is a 128M-byte, 168-pin, buffered dual-in-line memory module (DIMM). The DIMM is composed of eighteen TMS465409, 16777216 * 4-bit 4K-refresh EDO dynamic random-access memories (DRAMs), each in a 400-mil, 32-pin plastic thin small-outline package (TSOP) (DGE suffix), and two SN74LVC162244 16-bit buffers, each in a 48-lead plastic TSOP package mounted on a substrate with decoupling capacitors. See the TMS465409 data sheet (literature number SMKS895).
The TM16ER72LP is a 128M-byte, 168-pin, buffered DIMM. The DIMM is composed of eighteen TMS464409, 16777216 * 4-bit 8K-refresh EDO DRAMs, each in a 400-mil, 32-pin plastic TSOP (DGE suffix), and two SN74LVC162244 16-bit buffers, each in a 48-lead plastic TSOP package mounted on a substrate with decoupling capacitors. See the TM16ER72LP data sheet (literature number SMKS895).
These modules are intended for multimodule workstation/server applications where buffering is needed for address and control signals. Two copies of address 0 (A0 and B0) are defined to allow maximum performance for 4-byte applications that interleave between two 4-byte banks. A0 is common to the DRAMs used for DQ0DQ31, while B0 is common to the DRAMs used for DQ32DQ63.
TM16ER72LP Data Sheet
