TPS3123J12DBVR(2)

The TPS312x family of ultralow voltage processor supervisory circuits provides circuit initialization and timing supervision, primarily for DSP and processor-based systems.

During power-on, RESET is asserted when the supply voltage (V_DD) becomes higher than 0.75 V. Thereafter, the supply voltage supervisor of TPS312x monitors V_DD and keeps RESET output active as long as V_DD remains below the threshold voltage (V_IT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, t_d = 180 ms, starts after V_DD has risen above the threshold voltage (V_IT).

When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this TPS312x family have a fixed-sense threshold voltage (VIT) set by a high precision internal voltage divider.

In the TPS312x, the TPS3123/5/6/8 devices incorporate a manual reset input, MR. A low level at MR causes RESET to become active. The TPS3124 devices do not have the input MR, but include a high-level output RESET same as the TPS3125 and TPS3126 devices. In addition, the TPS3123/4/8 have a watchdog timer that needs to be triggered periodically by a positive or negative transition at WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval ttout= 0.8 s, RESET output becomes active for the time period (td).This event also reinitializes the watchdog timer.

The TPS312x circuits are available in a 5-pin SOT23-5 package. The TPS312x devices are characterized for operation over a temperature range of 40°C to 85°C.