TQ8213

• Single-chip 16:1 or 32:1 Multiplexer with integrated clocksynthesis and high performance 75mA/3.75V output driver
• Output can drive external optical modulator, 50W PECL/ECL transmission line, or directly modulated laser without further amplification
• Output symmetry adjust
• Selectable internal/external active highspeed 2.48832 GHz clock
• SONET/SDH compliant for 2.48832 Gb/s output data rate
• 622.08, 311.04, 155.52, 77.76, 51.84, 38.88, or 19.44 MHz PECL or TTL reference clock inputs
• Integrated PLL with external filter
• Four output clocks at 311.04, 155.52, 77.76, and 38.88 MHz.
• Internal even/odd (mode programmable) parity checker with alarm output
• 23mm 208-pin BGA package
• 5V single supply
• 40 to +125° C case operating temperature

The TQ8213 is a SONET/SDH OC48 MUX that time-division multiplexes a 16-bit or 32-bit parallel data bus to a serial 2.48832 Gb/s NRZ data stream for transmission through a communications channel. Without any additional amplification, the 2.48832 Gb/s output stage can drive either a directly modulated laser or an optical external modulator. Output may also be configured to provide standard ECL/PECL levels with excellent rise/fall times. The serial output data stream is available through either singleended or differential pins. Mark/space ratio adjustment allows compensation for asymmetries encountered in optoelectronics.

The TQ8213 operates in two different time-division multiplexing modes, making it extremely flexible for use in telecom and datacom applications. The serial 2.48832 Gb/s data stream can be generated from either a 16-bit wide 155.52 MHz data stream or a 32-bit wide 77.76 MHz data stream. Data integrity may be ensured through a byte-wise parity check, which occurs in parallel with the incoming data stream. An external parity alarm of TQ8213 is set whenever a parity check error is detected.

Transmit clocking of TQ8213  is selectable from either an internal or external Voltage Controlled Oscillator(VCO) as well as a selectable external or internal Phase Locked Loop (PLL). The selected clock source may be monitored at HCKOUT. The internal PLL utilizes an external reference clock, REFCLK, to aid in timing generation. The reference clock of TQ8213 may be one of seven commonly used system frequencies. A TTL level LOCK signal is supplied to indicate when the phase difference between the external reference clock and the internal divided down clock is less than p/4 radians.

Operating from a single +5V supply, the TQ8213 will provide fully compliant functionality and performance. Direct-connected TTL levels are used with both of the input modes.

The TQ8213 is fully compliant with SONET/SDH jitter specifications.