Features: ` High-performance CMOS nonvolatile static RAM 8192 x 8 bits
` 25, 35 and 45 ns Access Times
` 12, 20 and 25 ns Output Enable Access Times
` Hardware STORE Initiation (STORE Cycle Time < 10 ms)
` Automatic STORE Timing
` 105 STORE cycles to EEPROM
` 10 years data retention in EEPROM
` Automatic RECALL on Power Up
` Hardware RECALL Initiation (RECALL Cycle Time < 20 s)
` Unlimited RECALL cycles from EEPROM
` Unlimited Read and Write to SRAM
` Single 5 V ± 10 % Operation
` Operating temperature ranges:
0 to 70 °C
-40 to 85 °C
` QS 9000 Quality Standard
` ESD characterization according MIL STD 883C M3015.7-HBM (classification see IC Code Numbers)
` RoHS compliance and Pb- free
` Packages: PDIP28 (300 mil)
SOP28 (330 mil)
Pinout
Specifications
| Absolute Maximum Ratings a |
Symbol |
Min. |
Max. |
Unit |
| Power Supply Voltage |
VCC |
-0.5 |
7 |
V |
| Input Voltage |
VI |
-0.3 |
VCC+0.5 |
V |
| Output Voltage |
VO |
-0.3 |
VCC+0.5 |
V |
| Power Dissipation |
PD |
- |
1 |
W |
Operating Temperature C-Type
K-Type
|
Ta |
0
-40 |
70
85 |
°C
°C |
| Storage Temperature |
Tstg |
|
150 |
|
a: Stresses greater than those listed under „Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at condition above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DescriptionThe U630H64 has two separate modes of operation: SRAM mode and nonvolatile mode, determined by the state of the NE pin.
In SRAM mode, the memory of U630H64 operates as an ordinary static RAM. In nonvolatile operation, data is transferred in parallel from SRAM to EEPROM or from EEPROM to SRAM. In this mode SRAM functions are disabled.
The U630H64 is a fast static RAM (25, 35, 45 ns), with a nonvolatile electrically erasable PROM (EEPROM) element incorporated in each static memory cell. The SRAM can be read and written an unlimited number of times, while independent nonvolatile data resides in EEPROM. Data transfers from the SRAM U630H64 to the EEPROM (the STORE Operation), or from the EEPROM to the SRAM (the RECALL operation) are initiated through the state of the NE pin.
The U630H64 combines the high performance and ease of use of a fast SRAM with nonvolatile data integrity.
Once a STORE cycle is initiated,further input or output are disabled until the cycle is completed.Internally, RECALL U630H64 is a two step procedure. First, the SRAM data is cleared and second, the nonvolatile information is transferred into
the SRAM cells.
The RECALL U630H64 operation in no way alters the data in the EEPROM cells. The nonvolatile data can be recalled an unlimited number of times.
U630H64 Data Sheet
