Features: • CMOS non- volatile static RAM 8192 x 8 bits• 70 ns Access Time• 35 ns Output Enable Access Time• ICC = 15 mA at 200 ns Cycle Time• Unlimited Read and Write Cycles to SRAM• Automatic STORE to EEPROM on Power Down using charge stored in an integrated c...
U63764: Features: • CMOS non- volatile static RAM 8192 x 8 bits• 70 ns Access Time• 35 ns Output Enable Access Time• ICC = 15 mA at 200 ns Cycle Time• Unlimited Read and Write ...
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| Absolute Maximum Ratingsa | Symbol | Min. | Max. | Unit |
| Power Supply Voltage | VCC | -0.5 | 7 | V |
| Input Voltage | VI | -0.3 | V | |
| Output Voltage | VO | -0.3 | V | |
| Power Dissipation | PD | 1 | W | |
| Operating Temperature C-Type K-Type |
Ta | 0 -40 |
70 85 |
|
| Storage Temperature | Tstg | -65 | 150 |
The U63764 has two separate modes of operation: SRAM mode and nonvolatile mode. In SRAM mode, the memory operates as an ordinary static RAM. In non-volatile operation, data is transferred in parallel from SRAM to EEPROM or from EEPROM to SRAM. In this mode SRAM functions are disabled.
The U63764 is a static RAM with a non-volatile electrically erasable PROM (EEPROM) element incorporated in each static memory cell. The SRAM U63764 can be read and written an unlimited number of times, while independent nonvolatile data resides in EEPROM. Data transfers from the SRAM to the EEPROM (the STORE operation) take place automatically upon power down using charge stored in an integrated capacitor. Transfers from the EEPROM to the SRAM (the RECALL operation) take place automatically on power up. The U63764 combines the ease of use of an SRAM with nonvolatile data integrity.
STORE cycles of U63764 also may be initiated under user control via a software sequence.
Once a STORE cycle of U63764 is initiated, further input or output are disabled until the cycle is completed. Because a sequence of addresses is used for STORE initiation, it is important that no other read or write accesses intervene in the sequence or the sequence will be aborted.
RECALL cycles of U63764 may also be initiated by a software sequence. Internally, RECALL is a two step procedure. First, the SRAM data is cleared and second, the nonvolatile information is transferred into the SRAM cells.
The RECALL U63764 operation in no way alters the data in the EEPROM cells. The nonvolatile data can be recalled an unlimited number of times. The U63764 is pin compatible with standard SRAMs and standard battery backed SRAMs.