U6792B-D

The U6792B-D has the following features including 200-MHz minimum bandwidth allows for data rates of up to 200 Mb/s;Adjustable link monitor;Wide 60-dB input dynamic range;2.5 ns minimum input pulse;Low-power design: 30 mA maximum without load;Regulated  voltage  output  for voltage independent threshold adjust;Available in SO-16 package or chip form.

U6792B-D data quantizer is a low-noise, wideband IC for signal recovering in fiber optic receiver systems. U6792B-D contains a three stage wideband limiting amplifier which accepts input signal as low as 1.5 m Vpp with a 60 dB dynamic range. This sensitivity is achieved by using a dc restoration feedback loop which nulls any offset voltage produced in the limiting amplifier.The ECL outputs buffer can drive 50 loads to -2V.The minimum signal discriminator circuit provides a link monitor function with a user selectable threshold voltage.This data quantizer has a three stage limiting amplifier with an input common mode range of VEE + 1.8 V to V cc -1.0 V.Maximum sensitivity is achieved through the use of a do restoration feedback loop and ac coupling the input. When ac coupled, the input dc bias voltage is set by the limiting amplifier itself at about -2.1 V The differential input of U6792B-D requires two capacitors of equal value. For single ended operation, one of the coupling capacitors has to be connected to ground.

The link monitor function of U6792B-D is implemented by the minimum signal discriminator and the threshold generator circuits.The purpose of this function is to monitor the input signal and to provide a status signal indicating when the input signal falls below or rises above a preset voltage level. This is done by peak detecting the output of the first stage of the limiting amplifier and comparing this level with the internal threshold voltage set by VTHR.If VCR is left open, the typical threshold level is 2.85 mV.The an-chip reference voltage, VREG, U6792B-D can be used to adjust the voltage at VTHR by dividing VREG with a resistor string.