UPD75316GF-569-3B9

The UPD75316GF-569-3B9 is belong to the UPD75316 family. The 75316 family features an on-chip LCD controllerand driver with up to 16K bytes of ROM and 1024 nibbles of RAM. The instruction set operates on and 8-bit data. Timing is generated by two oscillators. The main oscillator normally drives the CPU and most peripherals. The 32.768-kHz subsystem oscillator provides time keeping when the main oscillator is turned off. Since CMOS power dissipation is proportional to clock rate, the 75316 family provides a software selectable instruction cycle time from 0.95 sec to 122 sec. The STOP and HALT modes turn off parts of the microcontroller for additional power savings. The data retention mode retains RAM contents down to 2.0 V.

The UPD75316GF-569-3B9 family possesses many features, such as (1) LCD controller/driver for up to 128 segments(32 segment lines; Four common lines; Static, 1/2 or 1/3 bias; LCD resistor ladder available on ROM versions), (2) subsystem oscillator allows watch timer and LCD to operate in power-down modes, 8-bit synchronized serial interface(Full-duplex, three-wire mode; Half-duplex, two-wire mode; NEC serial bus interface (SBI) mode), (3) timers: three channels(8-bit timer/event counter; 8-bit interval timer; Watch (clock) timer: 0.5-sec interrupt request), 32 l/O lines(Eight input-only lines; 16 bidirectional I/O lines;Eight 10-volt n-channel, open-drain l/O lines; Direct LED drive from 12 lines; 31 software selectable pullup resistors Eight mask selectable resistors (ROM versions only)), (4) eight 4-bit registers(Usable as four 8-bit registers), (5) memory-mapped on-chip peripherals, (6) vectored interrupt controller(12 edge detect inputs; Five vectored interrupts), (7) CMOS power saving and battery operation(Normal operating mode; 2.5 mA typical at 5V; HALT mode; 0.5 mA typical; STOP mode; 0.1A typical; Data retention down to 2 volts), (8) operating voltage ranges(ROM and 75P316A OTP/EPROM version; VDD from 2.7 to 6.0 V; 75P308 (standard OTP/EPROM); VDD = 5V±5%).