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Part Number: UPD75402A(A)
Description: The PD75402A(A) is a CMOS single-chip microcomputer which uses the 75X series architecture. I...
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UPD75402A(A)
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DataSheet
General Description
UPD75402A(A) General Description
The PD75402A(A) is a CMOS single-chip microcomputer which uses the 75X series architecture. It operates at high speed with a minimum instruction execution time of 0.95 s.
The PD75P402 is also available for system development evaluation. It contains one-time PROM instead of mask ROM used in the PD75402A(A).
UPD75402A(A) Maximum Ratings
| Parameter | Symbol | Conditions | Rated value | Unit | |
| Supply voltage | VDD | 0.3 to +7.0 | V | ||
| Input voltage | VI1 | Ports other than port 5 | 0.3 to VDD + 0.3 | V | |
| VI2 | Port 5 | Built-in pull-up resistor | 0.3 to VDD + 0.3 | V | |
| Open drain | 0.3 to +11.0 | V | |||
| Output voltage | VO | 0.3 to VDD + 0.3 | V | ||
| High-level output current |
IOH | Each pin | 15 | mA | |
| Total of all output pins | 30 | mA | |||
| Low-level output current |
IOL Note | One pin of port 0, 3, 5, or 6 | Peak value | 30 | mA |
| rms | 15 | mA | |||
| One pin of port 2 | Peak value | 20 | mA | ||
| rms | 10 | mA | |||
| Total of all pins of ports 0, 3, and 5 (excl. P33) |
Peak value | 100 | mA | ||
| rms | 60 | mA | |||
| Total of all pins of ports 2, 6, and P33 |
Peak value | 100 | mA | ||
| rms | 60 | mA | |||
| Operating temperature |
Topt | 40 to +85 | °C | ||
| Storage temperature | Tstg | 65 to +150 | °C | ||
UPD75402A(A) Features
• More reliable than the PD75402A
• High-speed operation with a minimum instruction execution time of 0.95 s (when the microcomputer operates at 4.19 MHz)
• Low voltage and low-speed instruction execution time of 15.3 s (when the microcomputer operates at 4.19 MHz)
• Memory mapping by on-chip peripheral hardware
• NEC standard serial bus interface (SBI)
• 8-bit basic interval timer (watchdog timer applicable)
• Interrupt function
• Three vectored interrupts (one external and two internal interrupts)
• One external test input
• Clock output function (remote controller output applicable)
• Capable of specifying the incorporation of 16 pull-up resistors by software
• High-speed operation with a minimum instruction execution time of 0.95 s (when the microcomputer operates at 4.19 MHz)
• Low voltage and low-speed instruction execution time of 15.3 s (when the microcomputer operates at 4.19 MHz)
• Memory mapping by on-chip peripheral hardware
• NEC standard serial bus interface (SBI)
• 8-bit basic interval timer (watchdog timer applicable)
• Interrupt function
• Three vectored interrupts (one external and two internal interrupts)
• One external test input
• Clock output function (remote controller output applicable)
• Capable of specifying the incorporation of 16 pull-up resistors by software
UPD75402A(A) Typical Application
Electronic units for automobiles, and suchlike
UPD75402A(A) Connection Diagram
UPD100500D-15
PDF/DataSheet Download
- Datasheet: UPD100500D-15
- File Size: 101698 KB
- Manufacturer:
- Click here to Download
- ·UPD100500D-20
- x1 SRAM
- 101698 KB
- ·UPD100504D-15
- x4 SRAM
- 101162 KB
- ·UPD10500D-15
- x1 SRAM
- 108645 KB
- ·UPD10500D-20
- x1 SRAM
- 108645 KB
- ·UPD10504D-15
- x4 SRAM
- 107973 KB
- ·UPD120N
- NEC [NEC]
- THREE-TERMINAL LOW-DROPOUT POSITIVE-VOLTAGE REGULATOR (OUTPUT CURRENT: 0.3 A)
- 161162 KB
- ·UPD120N15T1B
- NEC [NEC]
- THREE-TERMINAL LOW-DROPOUT POSITIVE-VOLTAGE REGULATOR (OUTPUT CURRENT: 0.3 A)
- 161162 KB
- ·UPD120N15T1B-E1
- NEC [NEC]
- THREE-TERMINAL LOW-DROPOUT POSITIVE-VOLTAGE REGULATOR (OUTPUT CURRENT: 0.3 A)
- 161162 KB
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