VSC1500

The VSC1500 has the following features including Power Dissipation:<2.5W typical;52-pin leaded or leadless ceramic chip carrier;Supported on MENTOR and DAISY workstations;Superior Performance:Supports clock rates up to 1.5 GHz in Mux/Demux applications;Proven GaAs E/D MESFET Process.

The VSC1500 is a 1500 gate GaAs structured cell array tailored for high speed applications in systems requiring clock rates up to 1.5 GHz.The architecture utilizes a structured cell approach that combines both high speed source coupled FET logic (SCFL) and low power direct coupled FET logic (DCFL) cells to allow the user to obtain the optimum speed/power trade-off. The speed critical sections of the design use high speed $CFL cells, while the remaining portion can be implemented with low power DCFL cells.The VSC1500 is built using Vitesse's proprietary Enhancement/Depletion GaAs MESFET process. The VSC1500 allows flexibility in design, while providing very short turnaround time (as little as six weeks) without compromising overall circuit performance.The high speed Il0 and fast internal gates make the VSC1500 ideally suited for mux/demux applications in fiber optic communications systems and computer backplanes.Other applications include critical paths in testers, LANs, and video graphics subsystems.Input cells are used to bring signals onto the array. There are two types of input cells:high speed differential inputs, and ECL inputs.

VSC1500 design software is supported on MENTOR, DAISY or VALID workstations. The Vitesse Designer's Kit includes documentation and software which allows the customer to
perform schematic capture, functional simulation, front-annotated timing simulation, electrical rules checks, and back annotated simulation after placement and routing are completed.Vitesse also has an interactive pre-placement program that customers may choose to use for their design.Design classes are provided to help the customer understand the gate array design process and are recommended to all customers planning to implement a design in a Vitesse gate array. These classes are two days in length and are provided at the Vitesse facility or at the customer's site.