W3020

Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operations sections of this data sheet. Exposure to maximum ratings for extended periods can adversely affect device reliability.

The W3020 is a highly integrated GSM transceiver designed to operate in dual-band handsets or in single-band handsets operating at 900, 1800, and 1900 MHz frequency bands (1900 MHz performance is not verified in production). The IC architecture allows the RF designer to provide solutions for three different frequency bands with very few PCB changes, thereby providing faster time to market and reduced development time.

The W3020 RF transceiver and W3000 PLL have been designed in conjunction with the SC1 (radio interface and DSP) to provide a complete GSM cellular solution. The W3020 interfaces to the W3000 UHF high-performance PLL IC. The W3020, in combination with the W3000, provides the transmitter, receiver, and frequency synthesizer. Adding a power amplifier(s), filters, and VCO modules completes theradio channel.

The baseband modulated signal is applied to the I/Q double-balanced mixer in a differential manner. The ±45° phase-shifted local oscillator requires no trim to achieve the required modulation spectral mask. Also, I/Q input signals require no dc offset calibration to achieve high phase accuracy signal. The IF signal outputs from the I/Q mixers are summed and brought out to an external filter that reduces the noise that could be intermodulated into the receive band. This signal is then applied to the low noise up-conversion mixer and brought to the RF output.

The received signal is amplified through the low-noise amplifier, which, combined with the preceding filter, dominates the receiver sensitivity. The signal is then passed through another external filter to attenuate the image frequency to an acceptable level. The signalpasses through the RF down-conversion mixer to the IF frequency. It is then filtered by an external surface acoustic wave (SAW) filter to bring the in-band blocking signals to an acceptable level. The signal is amplified in the IF strip of the receiver. The IF strip contains digital gain control (DGC) amplifiers at both the IF and baseband frequencies and precision lowpass filters. This allows the signal to be amplified while in-band blocking signals are removed. The precision I/Q demodulator splits the signal into its inphase and quadrature signals. The I/Q signals are lowpass filtered and further amplified. The I/Q amplifier contains integrated dc offset calibration circuitry. The outputs (I/Q) are fed to the ADC for further signal processing.

The second local oscillator (LO2), comprising a buffer for the external voltage-controlled oscillator (VCO) and a phase-locked loop (PLL), feeds the IF portions of both the modulator and the receiver. An external reference source, voltage-controlled crystal oscillator (VCXO), is divided from 13 MHz to 1 MHz through a counter. The 1 MHz is called the comparison frequency. The VCO frequency of 540 MHz is also divided down to 1 MHz. Both signals are fed into a phase detector, and the resultant error signal is fed through an external low-pass filter to the control input of the VCO.

The RF receive and transmit mixers are driven by two band-switchable external VCO modules and buffered internally on the IC. The VCOs are both controlled by a single W3000 PLL synthesizer and loop filter. Fast band-locking is achieved using a proprietary scaling technique integrated in the W3000 PLL.