W.A.R.P.1.1

W.A.R.P. is a VLSI Fuzzy Logic controller whose architecture arises from the need of realizing an integrated structure with high inferencing performances and flexibility. To get those results a modular architecture based on a set of parallel memory blocks has been implemented.

In orderto obtainhigh performancesW.A.R.P.uses different data representations during the various phases of the computational cycle, so that it is always operating on the optimal data representation. A vectorial characterization has been adopted for the Antecedent Membership Functions. W.A.R.P. exploits a SGS-THOMSON patented strategyto store theAntecedentMembership