WED3EG6418S

Features: Double-data-rate architecture Speed of 100MHz, 133MHz and 166MHz Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2,5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data o...

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SeekIC No. : 004545582 Detail

WED3EG6418S: Features: Double-data-rate architecture Speed of 100MHz, 133MHz and 166MHz Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2,5 (clock) Program...

floor Price/Ceiling Price

Part Number:
WED3EG6418S
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/3

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Product Details

Description



Features:

Double-data-rate architecture
Speed of 100MHz, 133MHz and 166MHz
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2,5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto and self refresh
Serial presence detect
JEDEC standard 200 pin SO-DIMM package
 Power Supply: 2.5V ± 0.25V



Specifications

Parameter
Symbol
Value
Units
Voltage on any pin relative to VSS
VIN, VOUT
-0.5 ~ 3.6
V
Voltage on VCC supply relative to VSS
VCC, VCCQ
-1.0 ~ 3.6
V
Storage Temperature
TSTG
-55 ~ +150
Power Dissipation
PD
8
W
Short Circuit Current
IOS
50
mA



Description

The WED3EG6418S is a 16Mx64 Double Data Rate SDRAM memory module based on 128Mb DDR SDRAM component.

The WED3EG6418S consists of eight 16Mx8 DDR SDRAMs in 66 pin TSOP package mounted on a 200 Pin FR4 substrate. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lenths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.




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