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XA-C3

Features: `A PeliCAN CAN 2.0B engine from the SJA1000 Stand¤Calone CA controller which supports 11¤C and 29¤Cbit IDentifiers and t maximum CAN data rate (1 Mbps) and CAN Diagnostics.` Hardware !Message Management! support for all major C protocols: DeviceNet, CANopen, OSEK.` Automatic (hardware) a...

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SeekIC No. : 004547570 Detail

XA-C3: Features: `A PeliCAN CAN 2.0B engine from the SJA1000 Stand¤Calone CA controller which supports 11¤C and 29¤Cbit IDentifiers and t maximum CAN data rate (1 Mbps) and CAN Diagnostics.` Hardware !Mess...

XA-C3 Data Sheet

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Part Number:
XA-C3
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/26

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Product Details

Description



Features:

 `A PeliCAN CAN 2.0B engine from the SJA1000 Stand¤Calone CA controller which supports 11¤C and 29¤Cbit IDentifiers and t maximum CAN data rate (1 Mbps) and CAN Diagnostics.
` Hardware !Message Management! support for all major C protocols: DeviceNet, CANopen, OSEK.
` Automatic (hardware) assembly of Fragmented Messages via a Transport Layer Co-Processor. Concurrent assembly of up to 32 separate interleaved Fragmented Messages
`32 CAN Transport Layer (CTL) Message Objects are modelled as a FullCAN Object Superset. 
`32 separate filters/screeners (one per Message Object), each allowing a 30¤Cbit ID Match and full 29¤Cbit Mask (i.e., each filter/screener represents a unique Group address).
 `Each Message Object can be configured as Receive or Transmit.
`A separate message buffer is associated with each CTL Message Object.  32 message buffers are located in XRAM and managed by 32 DMA channels.  Message buffer size for each Message Object is independently configurable in length (from 2 to 256 bytes).
`For single¤Cchip systems there is a 512¤Cbyte (on¤Cchip) X message buffer, independent of the 1K on¤Cchip DATA RAM, whic is extendable (off¤Cchip) to 8K bytes (i.e., 32 Message Objects tha can be up to 256 bytes each).


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Description

The XA-C3 is a member of the Philips XA (eXtended Architecture family of high-performance 16-Cbit single-chip microcontrollers. XA-C3 combines an array of standard  peripherals together with PeliCAN CAN 2.0B engine and unique !Message Management hardware to provide integrated support for most CAN Transport Layer (CTL) protocols such as DeviceNet, CANopen and OSEK. For additional details, refer to the XA-C3 Overview on page 35.




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