XR16C2850CJ

Added feature in devices with a top mark date code of "F2 YYWW" and newer:
5V tolerant inputs
0 ns address hold time (TAH)
•Pin-to-pin compatible and functionally compatible to Exar's ST16C2550 and XR16L2750 and TI's TL16C752B in the 48-TQFP package
•Pin-alike Exar's XR16L2750 and ST16C2550 48-TQFP package but with additional CLK8/16, CLKSEL and HDCNTL nputs
•Two independent UART channels
Register set compatible to 16C550
Up to 6.25 Mbps at 5V, and 4 Mbps at 3.3V
Transmit and Receive FIFOs of 128 bytes
Programmable TX and RX FIFO Trigger Levels
Transmit and Receive FIFO Level Counters
Automatic Hardware (RTS/CTS) Flow Control
Selectable Auto RTS Flow Control Hysteresis
Automatic Software (Xon/Xoff) Flow Control
Auto RS-485 Half-duplex Direction Control
Wireless Infrared (IrDA 1.0) Encoder/Decoder
Full modem interface
•Device Identification and Revision
•Crystal oscillator or external clock input
•Industrial and commercial temperature ranges
•48-TQFP and 44-PLCC packages

The XR16C2850CJ is an enhanced dual universal asynchronous receiver and transmitter (UART). Enhanced features include 128 bytes of TX and RX FIFOs, programmable TX and RX FIFO trigger level, FIFO level counters, automatic (RTS/CTS) hardware and (Xon/Xoff) software flow control, automatic RS-485 half duplex direction control output and data rates up to 6.25 Mbps at 5V and 8X sampling clock. Onboard status registers provide the user with operational status and data error flags. An internal loopback capability allows system diagnostics. The 2850 has a full modem interface and can operate at 2.97V to 5.5V and is pin-to-pin compatible to Exar's XR16C2850CJ and XR16C2750 except the 48-TQFP package. The 2850 register set is compatible to the industry standard ST16C2550 and is available in 48-pin TQFP and 44-pin PLCC packages.

NOTE: 1 Covered by U.S. Patent #5,649,122 and #5,949,787