Features: •2.25 to 5.5 Volt Operation
•5 Volt Tolerant Inputs
•Pin-to-pin and functionally compatible to National PC16552
•Pin-to-pin Compatible to Exar's ST16C2552, XR16L2752 and XR16C2852 in the 44-PLCC
•2 Independent UART ChannelsUp to 3.125Mbps with external clock of 50 MHz
Register Set Compatible to 16C550
16 byte Transmit FIFO to reduce the bandwidth requirement of the external CPU
16 byte Receive FIFO with error tags to reduce the bandwidth requirement of the external CPU
4 selectable RX FIFO Trigger Levels
Automatic RTS/CTS hardware flow control
Automatic XonXoff software flow control
Wireless infrared encoder/decoder
Full Modem Interface (CTS#, RTS#, DSR#, DTR#, RI#, CD#)
Programmable character lengths (5, 6, 7, 8) with even, odd, or no parity
Multi-Function output allows more package functions with fewer I/O pins
•Concurrent write to Channels A and B
•Crystal oscillator or external clock input
•48-TQFP (7x7x1.0 mm) and 44-PLCC packagesApplication•Portable Appliances
•Telecommunication Network Routers
•Ethernet Network Routers
•Cellular Data Devices
•Factory Automation and Process ControlsPinout
Specifications
| CH |
2 |
| CPUInterface |
Intel |
| Data Rate@5/3.3/2.5V |
3.1/1.8/1.0 |
| Tx/RxFIFO(Bytes) |
16/16 |
| Tx/RxFIFOCtrs |
No |
| Tx/RxFIFOINT Trig |
No/ 4 Levels |
| AutoRTS/CTS |
Yes |
| IrDaSup |
Yes |
| 5VTolInputs |
Yes |
| Sup V |
2.25-5.5 |
| Pkgs |
PLCC-44, TQFP-48 |
Power Supply Range 7 Volts
Voltage at Any Pin GND-0.3 V to VCC+0.3 V
Operating Temperature -40o to +85
Storage Temperature -65o to +150
Package Dissipation 500 mWDescription
This dual-channel product family is highly integrated and built for small board space, low voltage and high bandwidth requirements found in a variety of handheld and battery operated applications. These include Point-of-Sale (POS) terminals, tablets and notepads, CDMA cellular phones, expansion modules, instrumentation, cellular base stations, wireless infrared appliances and industrial automation controls.
The series consists of four devices: XR16L2450, XR16L2550, XR16L2551 and XR16L2552. Each has two independently controlled UART channels and operates over a broad range power source of 2.25V to 5.5V with 5V tolerant inputs.
The XR16L2551 uniquely offers a very small 32-QFN, 5x5x0.9mm, package with PowerSave feature to conserve power down to less than 30uA* of current consumption. These attributes are a perfect combination for tight space and/or battery operated designs. The PowerSave feature eliminates the need for two external octal transceivers to reduce board space requirement and lower overall system costs. The XR16L2551 also offers a pin select for Intel or Motorola data bus interface to reduce hardware design cycle.
The XR16L2550, XR16L2551 and XR16L2552 have 16-byte of TX and RX FIFOs for larger data buffering and provide automatic hardware (RTS/CTS) or software (Xon/Xoff) flow control to eliminate receiver data overflow and wasteful re-transmissions. In addition, the devices include the wireless infrared encoder/decoder for wireless communications. The XR16L2450 has one byte of TX and RX FIFO as its predecessor, the ST16C2450, but with lower operating voltage and 5V tolerant inputs. The 4 devices are pin and function compatible with their previous 5V series.
For UART technical support or to obtain an IBIS model for this product, please email Exar's UART Technical Support group.
The XR16L2552 (L2552) is a dual universal asynchronous receiver and transmitter (UART) with 5 volt tolerant inputs. The XR16L2552 is an improved version of the ST16C2552 UART with lower operating voltages and 5 volt tolerant inputs. The L2552 provides enhanced UART functions with 16 byte TX and RX FIFOs, automatic hardware (RTS/CTS) and software (Xon/Xoff) flow control, and a complete modem control interface. Onboard status registers provide the user with error indications and operational status. Indepedendent programmable baud rate generators are provided to select transmit and receive clock rates up to 3.125Mbps. An internal loop-back capability allows onboard diagnostics. The L2552 provides block mode data transfers (DMA) through FIFO controls. DMA transfer monitoring is provided through the signals TXRDY# and RXRDY#. An Alternate Function Register provides the user with the ability to write the control registers for both UARTs concurrently and selection of the Multi-Function output (Baudout#, OP2#, or RXRDY#).
NOTE: 1 Covered by U.S. Patent #5,649,122.
XR16L2552 Data Sheet
