A45L9332A

Features: JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Dual banks / Pulse RASMRS cycle with address key programs- CAS Latency (2,3)- Burst Length (1,2,4,8 & full page) - Burst Type (Sequential & Interleave) All inputs are sampled at the positive going edge of...

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A45L9332A Picture
SeekIC No. : 004260349 Detail

A45L9332A: Features: JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Dual banks / Pulse RASMRS cycle with address key programs- CAS Latency (2,3)- Burst Length (1,2,4,8 & full p...

floor Price/Ceiling Price

Part Number:
A45L9332A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/22

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Product Details

Description



Features:

JEDEC standard 3.3V power supply
LVTTL compatible with multiplexed address
Dual banks / Pulse RAS
MRS cycle with address key programs 
- CAS Latency (2,3) 
-  Burst Length (1,2,4,8 & full page)
-  Burst Type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system clock
Burst Read Single-bit Write operation
DQM 0-3 for byte masking
Auto & self refresh
32ms refresh period (2K cycle)
100 Pin QFP, LQFP (14 X 20 mm)



Pinout

  Connection Diagram  Connection Diagram


Specifications

Voltage on any pin relative to VSS (Vin, Vout )  . . . . . . . . .  
 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-1.0V to +4.6V
Voltage on VDD supply relative to VSS (VDD, VDDQ )  
 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - . . 1.0V to +4.6V
Storage Temperature (TSTG) . . . . . . . . .  -55°C to +150°C
Soldering Temperature X Time (TSLODER) . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .   . 260°C X 10sec
Power Dissipation (PD) . . . . . . . . . . . . . . . . . . . . . . . .   . .1W
Short Circuit Current (Ios) . . . . . .  . . . . . . . . . . . . .   .   50mA 
 




Description

The A45L9332A is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 X 262,144 words by 32
bits, fabricated with AMIC's high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating  frequencies, programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory system applications.  Write per bit and 8 columns block write improves performance in graphics system.




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