PinoutSpecificationsSupply voltage range, VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 VInput voltage range, VI(see Note 1). . . . . . . . . . . . . . . . . . . . . . . . . ...1.2 V to 7 VInput current range. . . . . . . . . . . . . . . . . . . . . . . . . . . ...
SN74F377A: PinoutSpecificationsSupply voltage range, VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 VInput voltage range, VI(see Note 1). . . . . . . . . . . . . . . . . . . ...
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The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The SN74F377A features a latched clock enable (CE</a>) input.
SN74F377A Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if CE</a> is low. Clock triggering occurs at a particular voltage level and is not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the CE</a> input.
The SN74F377A is characterized for operation from 0°C to 70°C.