i.MX31

Not only do the i.MX31 and i.MX31L processors offer a wide assortment of security features, but these features are robust and offer a high degree of protection for security. The i.MX31 and i.MX31L processors'security architecture is based on efficient system partitioning between software and hardware implementations.
   The following security features are implemented:
• MMU (Memory Management Unit)
• Security Controller (SCC), including Secure RAM and Security Monitor
• Random Number Generator Accelerator (RNGA)
• Secure JTAG controller (with optional JTAG disabling)
• Universal Unique Identification
• Real Time Integrity Checker (RTIC), Including SHA-1 accelerator
• High Assurance Boot (HAB)
• Tamper Detection
   These security features are intended to address the following concerns:
• Service carriers concerns of portable device cloning and theft of services
• OS and vendor SW authentication
• Secure mobile communications and transactions
• Secure video conference call
• Secure M-commerce.
• Digital rights management (DRM).
• Defense against physical tampering.