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A6810, A6810ELW, A6810KA

Table of contents:
Info of A6810
Info of A6810ELW
Info of A6810KA

A6810, A6810ELW, A6810KA Selling Leads, Datasheet

MFG:A Package Cooled:SOP D/C:08+/09+

A6810, A6810ELW, A6810KA Datasheet download

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Part Number: A6810

MFG: A

Package Cooled: SOP

D/C: 08+/09+

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A6810 General Description

The A6810 combines 10-bit CMOS shift registers, accompanying data latches, and control circuitry with bipolar sourcing outputs and PNP active pull-downs. Designed primarily to drive vacuum-fluorescent (VF) displays, the 60 V and ?0 mA output ratings also allow this device to be used in many other peripheral power driver applications. The A6810 features an increased data input rate (compared with the older UCN/UCQ5810-F) and a controlled output slew rate.

The CMOS shift register and latches allow direct interfacing with microprocessor-based systems. With a 3.3 or 5 V logic supply, serial data-input rates of at least 10 MHz can be attained

A CMOS serial data output permits cascaded connections in applications requiring additional drive lines. Similar devices are available as the A6812 (20-bit) and A6818 (32-bit).

The A6810 output source drivers are NPN Darlingtons, capable of sourcing up to 40 mA. The controlled output slew rate reduces electromagnetic noise, which is an important consideration in systems that include telecommunications and microprocessors, and to meet government emissions regulations. For inter-digit blanking, all output drivers can be disabled and all sink drivers turned on with a BLANKING input high. The PNP active pulldowns can sink at least 2.5 mA.

The A6810 is available in three temperature ranges for optimum performance in commercial (S), industrial (E), and automotive (K) applications. It is provided in two package styles, through-hole DIP (package A) and surface-mount SOIC (package LW). Copper leadframes, low logic-power dissipation, and low output-saturation voltages allow all devices to source 25 mA from all outputs continuously over the full operating tem pera ture range.

The lead (Pb) free versions have 100% matte tin leadframe plating.

A6810 Maximum Ratings

Controlled output slew rate
High-speed data storage
60 V minimum output breakdown
High data-input rate
PNP active pull-downs
Low output-saturation voltages
Low-power CMOS logic and latches
Improved replacements for TL4810x, UCN5810x, and UCQ5810x

A6810 Features

` Controlled Output Slew Rate
` High-Speed Data Storage
` 60 V Minimum
Output Breakdown
` High Data Input Rate
` PNP Active Pull-Downs
` Low Output-Saturation Voltages
` Low-Power CMOS Logic and Latches
` Improved Replacements for TL4810, UCN5810,and UCQ5810

A6810 Connection Diagram

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