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AX88172L-ED3, AX88178LF, AX88180

AX88172L-ED3, AX88178LF, AX88180 Selling Leads, Datasheet

MFG:ASIX  Package Cooled:QFP  D/C:04+

AX88172L-ED3, AX88178LF, AX88180 Picture

AX88172L-ED3, AX88178LF, AX88180 Datasheet download

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Part Number: AX88172L-ED3

 

MFG: ASIX

Package Cooled: QFP

D/C: 04+

 

 

 
 
 
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About AX8004

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Datasheet: AX8004

File Size: 65749 KB

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Datasheet: AX8004

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Datasheet: AX8004

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AX88180 General Description

The AX88180 is a high-performance and cost-effective non-PCI Gigabit Ethernet controller for various embedded systems including consumer electronics and home network markets that require a higher bandwidth of network connectivity. The AX88180 supports 16/32-bit SRAM-like host interface and Gigabit Ethernet MAC, which is IEEE802.3 10Base-T, IEEE802.3u 100Base-T and IEEE802.3ab 1000Base-T compatible. The AX88180 supports full-duplex or half-duplex operation at 10/100/1000Mbps speed with auto-negotiation or manual setting. The AX88180 integrates large embedded SRAM for packet buffering to accommodate high bandwidth applications and supports IP/TCP/UDP checksum in hardware to offload processing loading from microprocessor/microcontroller in an embedded system.

AX88180 Maximum Ratings

  • High-performance non-PCI local bus
    • 16/32-bit SRAM-like host interface (US Patent Approval)
    • Supports big/little endian data bus type
    • Large embedded SRAM for packet buffers
      • 32K bytes for receive buffer
      • 8K bytes for transmit buffer
    • Supports IP/TCP/UDP checksum offloads
    • Supports interrupt with high or low active trigger mode
  • Highly-integrated Gigabit Ethernet controller
    • Compatible with IEEE802.3, 802.3u and 802.3ab standards
    • Supports 10/100/1000Mbps data rate
    • Supports full duplex operations with 1000Mbps data rate
    • Supports full and half duplex operations with 10/100Mbps data rate
    • Supports 10/100/1000Mbps N-way Auto- negotiation operation
    • Supports 10/100/1000Mbps data rate with RGMII interface
    • Supports IEEE 802.3x flow control for full-duplex operation
    • Supports back-pressure flow control for half-duplex operation
    • Supports packet length set by software
    • Supports max 4K bytes JUMBO packet
  • Supports Wake-on-LAN function by following events
    • Detection of a change in the network link state
    • Receipt of a Magic Packet
  • Supports optional EEPROM interface
  • Supports PCMCIA in 16-bit mode
  • Supports system reference clock from 40MHz to 100MHz
  • Integrated voltage regulator
  • 3.3V power supply with 5V I/O tolerance
  • 128-pin LQFP with CMOS process, RoHS package

AX88180 Connection Diagram

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