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CDC582, CDC582PAH, CDC586

Table of contents:
Info of CDC582
Info of CDC582PAH
Info of CDC586

CDC582, CDC582PAH, CDC586 Selling Leads, Datasheet

MFG:Texas Instruments Category:Integrated Circuits (ICs) Package Cooled:QFP D/C:08+

CDC582, CDC582PAH, CDC586 Datasheet download

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Part Number: CDC582

Category: Integrated Circuits (ICs)

MFG: Texas Instruments

Package Cooled: QFP

D/C: 08+

Description: IC 3.3V PLL CLOCK DRIVER 52-TQFP

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CDC582 Parameters

CDC582 Features

Low Output Skew for Clock-Distribution and Clock-Generation Applications
Operates at 3.3-V V_CC
Distributes Differential LVPECL Clock Inputs to 12 TTL-Compatible Outputs
Two Select Inputs Configure Up to Nine Outputs to Operate at One-Half or Double the Input Frequency
No External RC Network Required
State-of-the-Art EPIC-IIB^TM BiCMOS Design Significantly Reduces Power Dissipation
External Feedback Input (FBIN) Is Used to Synchronize the Outputs With the Clock Inputs
Application for Synchronous DRAMs
Distributed V_CC and Ground Pins Reduce Switching Noise
Packaged in 52-Pin Quad Flatpack EPIC-IIB is a trademark of Texas Instruments Incorporated.

CDC582 General Description

3.3V PLL Clock Driver with LVPECL Output & LVTTL Outputs with 1/2x, 1x and 2x Frequency Options

CDC582 Features

Low Output Skew for Clock-Distribution and Clock-Generation Applications
Operates at 3.3-V V_CC
Distributes Differential LVPECL Clock Inputs to 12 TTL-Compatible Outputs
Two Select Inputs Configure Up to Nine Outputs to Operate at One-Half or Double the Input Frequency
No External RC Network Required
State-of-the-Art EPIC-IIB^TM BiCMOS Design Significantly Reduces Power Dissipation
External Feedback Input (FBIN) Is Used to Synchronize the Outputs With the Clock Inputs
Application for Synchronous DRAMs
Distributed V_CC and Ground Pins Reduce Switching Noise
Packaged in 52-Pin Quad Flatpack EPIC-IIB is a trademark of Texas Instruments Incorporated.

CDC582 Typical Application

CDC582 Datasheet

CDC582PAH Parameters

Technical/Catalog Information	CDC582PAH
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Type	PLL Clock Driver
Voltage - Supply	3 V ~ 3.6 V
Number of Outputs	12
Input	LVPECL
Output	LVTTL
Frequency-Max	100MHz
Package / Case	52-TQFP
Packaging	Tube
Operating Temperature	0°C ~ 70°C
Drawing Number	296; 4040281; PAH; 52
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	CDC582PAH CDC582PAH 296 6708 5 ND 29667085ND 296-6708-5

CDC586 Parameters

CDC586 Features

Low Output Skew for Clock-Distribution and Clock-Generation Applications
Operates at 3.3-V V_CC
Distributes One Clock Input to Twelve Outputs
Two Select Inputs Configure Up to Nine Outputs to Operate at One-Half or Double the Input Frequency
No External RC Network Required
External Feedback Pin (FBIN) Is Used to Synchronize the Outputs to the Clock Input
Application for Synchronous DRAM, High-Speed Microprocessor
TTL-Compatible Inputs and Outputs
Outputs Drive Parallel 50- Terminated Transmission Lines
State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation
Distributed V_CC and Ground Pins Reduce Switching Noise
Packaged in 52-Pin Thin Quad Flat Package

CDC586 General Description

3.3V PLL Clock Driver with 1/2x, 1x and 2x Frequency Options

CDC586 Features

Low Output Skew for Clock-Distribution and Clock-Generation Applications
Operates at 3.3-V V_CC
Distributes One Clock Input to Twelve Outputs
Two Select Inputs Configure Up to Nine Outputs to Operate at One-Half or Double the Input Frequency
No External RC Network Required
External Feedback Pin (FBIN) Is Used to Synchronize the Outputs to the Clock Input
Application for Synchronous DRAM, High-Speed Microprocessor
TTL-Compatible Inputs and Outputs
Outputs Drive Parallel 50- Terminated Transmission Lines
State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation
Distributed V_CC and Ground Pins Reduce Switching Noise
Packaged in 52-Pin Thin Quad Flat Package

CDC586 Typical Application

CDC586 Datasheet

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