P89LPC930, P89LPC930BA, P89LPC930BDH Selling Leads, Datasheet
MFG:PHILIPS Package Cooled:07+ D/C:05+
P89LPC930, P89LPC930BA, P89LPC930BDH Datasheet download
Part Number: P89LPC930
MFG: PHILIPS
Package Cooled: 07+
D/C: 05+
P89LPC930, P89LPC930BA, P89LPC930BDH
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Info of P89LPC930
Info of P89LPC930BA
Info of P89LPC930BDH
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About P89LPC930
PDF/DataSheet Download
Datasheet: P89LPC930
File Size: 274115 KB
Manufacturer: PHILIPS [Philips Semiconductors]
Download : Click here to Download
About P89C51
PDF/DataSheet Download
Datasheet: P89C51
File Size: 571069 KB
Manufacturer: Philips
Download : Click here to Download
About P89C51
PDF/DataSheet Download
Datasheet: P89C51
File Size: 571069 KB
Manufacturer: Philips
Download : Click here to Download
P89LPC930 General Description
The P89LPC930/931 are single-chip microcontrollers designed for applications demanding high-integration, low cost solutions over a wide range of performance requirements. The P89LPC930/931 is based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system level functions have been incorporated into the P89LPC930/931 in order to reduce component count, board space, and system cost.
P89LPC930 Maximum Ratings
| Symbol | Parameter | Conditions | Min | Max | Unit |
| Tamb(bias) | operating bias ambient temperature | -55 | +125 | °C | |
| Tstg | storage temperature range | -65 | +150 | °C | |
| Vxtal | voltage on XTAL1, XTAL2 pin to VSS | VDD + 0.5 | v | ||
| Vn | voltage on any other pin to VSS | -0.5 | +5.5 | v | |
| IOH(I/O) | HIGH-level output current per I/O pin | 20 | mA | ||
| IOL(I/O) | LOW-level output current per I/O pin | 20 | mA | ||
| II/O(tot)(max) | maximum total I/O current | 100 | mA | ||
| Ptot(pack) | total power dissipation per package | based on package heat transfer, not device power consumption |
1.5 | w |
P89LPC930 Features
` A high performance 80C51 CPU provides instruction cycle times of 111 ns to
222 ns for all instructions except multiply and divide when executing at 18 MHz.
This is 6 times the performance of the standard 80C51 running at the same clock
frequency. A lower clock frequency for the same performance results in power
savings and reduced EMI.
` 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
` 4 kB/8 kB Flash code memory with 1 kB sectors, and 64-byte page size.
` Byte-erase allowing code memory to be used for data storage.
` Flash program operation completes in 2 ms.
` Flash erase operation completes in 2 ms.
` 256-byte RAM data memory.
` Two 16-bit counter/timers. Each timer may be configured to toggle a port output
upon timer overflow or to become a PWM output.
` Real-Time clock that can also be used as a system timer.
` Two analog comparators with selectable inputs and reference source.
` Enhanced UART with fractional baud rate generator, break detect, framing error
detection, automatic address detection and versatile interrupt capabilities.
` 400 kHz byte-wide I2C-bus communication port.
` SPI communication port.
` Eight keypad interrupt inputs, plus two additional external interrupt inputs.
` Four interrupt priority levels.
` Watchdog timer with separate on-chip oscillator, requiring no external
components. The Watchdog time-out time is selectable from 8 values.
` Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A reset counter and reset glitch suppression circuitry prevent
spurious and incomplete resets. A software reset function is also available.
` Low voltage reset (Brownout detect) allows a graceful system shutdown when
power fails. May optionally be configured as an interrupt.
` Oscillator Fail Detect. The watchdog timer has a separate fully on-chip oscillator
allowing it to perform an oscillator fail detect function.
` Configurable on-chip oscillator with frequency range and RC oscillator options
(selected by user programmed Flash configuration bits). The RC oscillator (factory
calibrated to ±1 %) option allows operation without external oscillator
components. Oscillator options support frequencies from 20 kHz to the maximum
operating frequency of 18 MHz. The RC oscillator option is selectable and fine
tunable.
` Programmable port output configuration options:
` Quasi-bidirectional
` Open drain
` Push-pull
` Input-only
` Port 'input pattern match' detect. Port 0 may generate an interrupt when the value
of the pins match or do not match a programmable pattern.
` Second data pointer.
` Schmitt trigger port inputs.
` LED drive capability (20 mA) on all port pins. Maximum combined I/O current of 100 mA.
` Controlled slew rate port outputs to reduce EMI. Outputs have approximately
10 ns minimum ramp times.
` 23 I/O pins minimum (28-pin package). Up to 26 I/O pins while using on-chip
oscillator and reset options.
` Only power and ground connections are required to operate the P89LPC930/931
using on-chip oscillator and on-chip reset options.
` Serial Flash programming allows in-circuit production coding. Flash security bits
prevent reading of sensitive programs.
` In-Application Programming of the Flash code memory. This allows changing the
code in a running application.
` Idle and two different Power-down reduced power modes. Improved wake-up from
Power-down mode (a low interrupt input starts execution). Typical Power-down
current is 1 mA (total Power-down with voltage comparators disabled).
` 28-pin TSSOP package.
` Emulation support.
222 ns for all instructions except multiply and divide when executing at 18 MHz.
This is 6 times the performance of the standard 80C51 running at the same clock
frequency. A lower clock frequency for the same performance results in power
savings and reduced EMI.
` 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
` 4 kB/8 kB Flash code memory with 1 kB sectors, and 64-byte page size.
` Byte-erase allowing code memory to be used for data storage.
` Flash program operation completes in 2 ms.
` Flash erase operation completes in 2 ms.
` 256-byte RAM data memory.
` Two 16-bit counter/timers. Each timer may be configured to toggle a port output
upon timer overflow or to become a PWM output.
` Real-Time clock that can also be used as a system timer.
` Two analog comparators with selectable inputs and reference source.
` Enhanced UART with fractional baud rate generator, break detect, framing error
detection, automatic address detection and versatile interrupt capabilities.
` 400 kHz byte-wide I2C-bus communication port.
` SPI communication port.
` Eight keypad interrupt inputs, plus two additional external interrupt inputs.
` Four interrupt priority levels.
` Watchdog timer with separate on-chip oscillator, requiring no external
components. The Watchdog time-out time is selectable from 8 values.
` Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A reset counter and reset glitch suppression circuitry prevent
spurious and incomplete resets. A software reset function is also available.
` Low voltage reset (Brownout detect) allows a graceful system shutdown when
power fails. May optionally be configured as an interrupt.
` Oscillator Fail Detect. The watchdog timer has a separate fully on-chip oscillator
allowing it to perform an oscillator fail detect function.
` Configurable on-chip oscillator with frequency range and RC oscillator options
(selected by user programmed Flash configuration bits). The RC oscillator (factory
calibrated to ±1 %) option allows operation without external oscillator
components. Oscillator options support frequencies from 20 kHz to the maximum
operating frequency of 18 MHz. The RC oscillator option is selectable and fine
tunable.
` Programmable port output configuration options:
` Quasi-bidirectional
` Open drain
` Push-pull
` Input-only
` Port 'input pattern match' detect. Port 0 may generate an interrupt when the value
of the pins match or do not match a programmable pattern.
` Second data pointer.
` Schmitt trigger port inputs.
` LED drive capability (20 mA) on all port pins. Maximum combined I/O current of 100 mA.
` Controlled slew rate port outputs to reduce EMI. Outputs have approximately
10 ns minimum ramp times.
` 23 I/O pins minimum (28-pin package). Up to 26 I/O pins while using on-chip
oscillator and reset options.
` Only power and ground connections are required to operate the P89LPC930/931
using on-chip oscillator and on-chip reset options.
` Serial Flash programming allows in-circuit production coding. Flash security bits
prevent reading of sensitive programs.
` In-Application Programming of the Flash code memory. This allows changing the
code in a running application.
` Idle and two different Power-down reduced power modes. Improved wake-up from
Power-down mode (a low interrupt input starts execution). Typical Power-down
current is 1 mA (total Power-down with voltage comparators disabled).
` 28-pin TSSOP package.
` Emulation support.
P89LPC930 Connection Diagram
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