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MFG:PHI  Package Cooled:DIP  D/C:03+  

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Part Number: P89C51RD2BN/01

 

MFG: PHI

Package Cooled: DIP

D/C: 03+

Description: The P89C51RA2/RB2/RC2/RD2xx contains a non-volatile8KB/16KB/32KB/64KB Flash program memory that ...


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P89C51RD2BN/01 General Description


The P89C51RA2/RB2/RC2/RD2xx contains a non-volatile 8KB/16KB/32KB/64KB Flash program memory that is both parallel programmable and serial In-System and In-Application Programmable. In-System Programming (ISP) allows the user to download new code while the microcontroller sits in the application. In-Application Programming (IAP) means that the microcontroller fetches new program code and reprograms itself while in the system. This allows for remote programming over a modem link. A default serial loader (boot loader) program in ROM allows serial In-System programming of the Flash memory via the UART without the need for a loader in the Flash code. For In-Application Programming, the user program erases and reprograms the Flash memory by use of standard routines contained in ROM.

The device supports 6-clock/12-clock mode selection by programming a Flash bit using parallel programming or In-System Programming. In addition, an SFR bit (X2) in the clock control register (CKCON) also selects between 6-clock/12-clock mode.

Additionally, when in 6-clock mode, peripherals may use either 6 clocks per machine cycle or 12 clocks per machine cycle. This choice is available individually for each peripheral and is selected by bits in the CKCON register.

This device is a Single-Chip 8-Bit Microcontroller manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family. The instruction set is 100% compatible with the 80C51 instruction set.

The device also has four 8-bit I/O ports, three 16-bit timer/event counters, a multi-source, four-priority-level, nested interrupt structure, an enhanced UART and on-chip oscillator and timing circuits.

The added features of the P89C51RA2/RB2/RC2/RD2xx make it a powerful microcontroller for applications that require pulse width modulation, high-speed I/O and up/down counting capabilities such as motor control.

P89C51RD2BN/01 Maximum Ratings

PARAMETER
RATING
UNIT
Operating temperature under bias
0 to +70 or 40 to +85
°C
Storage temperature range
65 to +150
°C
Voltage on EA/VPP pin to VSS
0 to +13.0
V
Voltage on any other pin to VSS
0.5 to +6.5
V
Maximum IOL per I/O pin
15
mA
Power dissipation (based on package heat transfer limitations, not device power consumption)
1.5
W
NOTES:
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any conditions other than those described in the AC and DC Electrical Characteristics section of this specification is not implied.
2. This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maximum.
3. Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless otherwise noted.

P89C51RD2BN/01 Features

• 80C51 Central Processing Unit
• On-chip Flash Program Memory with In-System Programming  (ISP) and In-Application Programming (IAP) capability
• Boot ROM contains low level Flash programming routines for  downloading via the UART
• Can be programmed by the end-user application (IAP)
• Parallel programming with 87C51 compatible hardware interface  to programmer
• Supports 6-clock/12-clock mode via parallel programmer (default
clock mode after ChipErase is 12-clock)
• 6-clock/12-clock mode Flash bit erasable and programmable via  ISP
• 6-clock/12-clock mode programmable "on-the-fly" by SFR bit
• Peripherals (PCA, timers, UART) may use either 6-clock or
12-clock mode while the CPU is in 6-clock mode
• Speed up to 20 MHz with 6-clock cycles per machine cycle(40 MHz equivalent performance); up to 33 MHz with 12 clocks per machine cycle
• Fully static operation
• RAM expandable externally to 64 kbytes
• Four interrupt priority levels
• Seven interrupt sources
• Four 8-bit I/O ports
• Full-duplex enhanced UART
Framing error detection
Automatic address recognition
• Power control modes
Clock can be stopped
Idle mode
Power down mode
• Programmable clock-out pin
• Second DPTR register
• Asynchronous port reset
• Low EMI (inhibit ALE)
• Programmable Counter Array (PCA)
PWM
Capture/compare

P89C51RD2BN/01 Connection Diagram

P89C51RD2BN/01  Connection Diagram

P89C51RD2BN/01 datasheet

P89C51RD2BN/01
PDF/DataSheet Download

  • Datasheet: P89C51RD2BN/01
  • File Size: 413979 KB
  • Manufacturer: PHILIPS [Philips Semiconductors]
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