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QS5919J-133J, QS5919T, QS5919T-100TQ

Table of contents:
Info of QS5919J-133J
Info of QS5919T
Info of QS5919T-100TQ

QS5919J-133J, QS5919T, QS5919T-100TQ Selling Leads, Datasheet

MFG:430 Package Cooled:LATTICE D/C:PLCC

QS5919J-133J, QS5919T, QS5919T-100TQ Picture

QS5919J-133J, QS5919T, QS5919T-100TQ Datasheet download

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Part Number: QS5919J-133J

MFG: 430

Package Cooled: LATTICE

D/C: PLCC

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QS5919T General Description

The QS5919T Clock Driver uses an internal phase locked loop (PLL) to lock low skew outputs to one of two reference clock inputs. Eight outputs are available: 2xQ, Q0-Q4, Q5, Q/2. Careful layout and design ensure < 350ps skew between the Q0-Q4, and Q/2 outputs. The QS5919T includes an internal RC filter which provides excellent jitter characteristics and eliminates the need for external components. Various combinations of feedback and a divide-by-2 in the VCO path allow applications to be customized for linear VCO operation over a wide range of input SYNC frequencies. The PLL can also be disabled by the PLL_EN signal to allow low frequency or DC testing. The LOCK output asserts to indicate when phase lock has been achieved. The QS5919T is designed for use in highperformance workstations, multi-board computers, networking hardware, and mainframe systems. Several can be used in parallel or scattered throughout a system for guaranteed low skew, system-wide clock distribution networks.

For more information on PLL clock driver products, see Application Note AN-227.

QS5919T Maximum Ratings

Symbol	Rating		Max.	Unit
V_DD, A_VDD	Supply Voltage to Ground		0.5 to +7	V
V_IN	DC Input Voltage VIN		0.5 to +7	V
	Maximum Power Dissipation (TA = 85°C)	QSOP	655	mW
	Maximum Power Dissipation (TA = 85°C)	PLCC	770	mW
T_STG	Storage Temperature Range		65°C to +150°C	°C

QS5919T Features

` 5V operation
` Low noise TTL level outputs
` < 350ps output skew, Q0Q4
` 2xQ output, Q outputs, Q output, Q/2 output
` Outputs 3-state and reset while OE/RST low
` PLL disable feature for low frequency testing
` Internal loop filter RC network
` Functional equivalent to Motorola MC88915
` Positive or negative edge synchronization (PE)
` Balanced drive outputs ±24mA
` 160MHz maximum frequency (2xQ output)
` Available in QSOP and PLCC packages

QS5919T Connection Diagram

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