QS5280AT

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sectionsof this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. Vcc Terminals.
3. All terminals except Vcc.

The QS5280AT clock buffer/driver circuits can be used for clock buffering schemes where low skew is a key parameter. The QS5280AT offers two banks of five non-inverting outputs. This device provides low propagation delay buffering with on-chip skew of 0.7ns for same-transition, same-bank signals.

The QS5280AT has on-chip series termination resistors for lower noise clock signals.

The QS5280AT series resistor version is recommended for driving unterminated lines with capacitive loading and other noise sensitive clock distribution circuits. These clock buffer products are designed for use in high-performance workstations and in embedded and personal computing systems. Several devices can be used in parallel or scattered throughout a system for guaranteed low skew, system-wide clock distribution networks.

The QS5280AT is characterized for operation at -40°C to +85°C.