STP9NA50FI, STP9NB50, STP9NB50FP Selling Leads, Datasheet
MFG:ST Package Cooled:TO-220 D/C:06+
STP9NA50FI, STP9NB50, STP9NB50FP Datasheet download

Part Number: STP9NA50FI
MFG: ST
Package Cooled: TO-220
D/C: 06+
MFG:ST Package Cooled:TO-220 D/C:06+
STP9NA50FI, STP9NB50, STP9NB50FP Datasheet download

MFG: ST
Package Cooled: TO-220
D/C: 06+
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Datasheet: STP9NA50FI
File Size: 202687 KB
Manufacturer: STMICROELECTRONICS [STMicroelectronics]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: STP9NB50
File Size: 111017 KB
Manufacturer: STMICROELECTRONICS [STMicroelectronics]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: STP9NB50FP
File Size: 111017 KB
Manufacturer: STMICROELECTRONICS [STMicroelectronics]
Download : Click here to Download
This series of POWER MOSFETS represents the most advanced high voltage technology. The optimized cell layout coupled with a new proprietary edge termination concur to give the device low RDS(on) and gate charge, unequalled ruggedness and superior switching performance.
|
Symbol |
Parameter |
Value |
Unit |
|
VDS |
Drain-sourceVoltage(VGS =0) |
500 |
V |
|
VDGR |
Drain-gateVoltage(RGS =20k) |
500 |
V |
|
VGS |
Gate-sourceVoltage |
±30 |
V |
|
ID |
DrainCurrent(continuous)atTc =25 |
5 |
A |
|
ID |
Drain Current(continuous)atTc =100 |
3.1 |
A |
|
IDM(`) |
Drain Current(pulsed) |
35 |
A |
|
Ptot |
Total DissipationatT =25 |
45 |
W |
| Derating Factor |
0.36 |
W/ | |
|
VISO |
InsulationWithstandVoltage(DC) |
2000 |
V |
|
Tstg |
Storage Temperature |
-65 to1 50 |
|
|
Tj |
Max.Operating Junction Temperature |
150 |
|
TYPE |
VDSS |
RDS(on) |
ID |
| STP9NA50FI |
500 V |
< 0.8 |
5 A |
Using the latest high voltage MESH OVERLAY] process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company's proprieraty edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics.
|
Symbol |
Parameter |
Value |
Units |
|
VDS |
Drain-source Voltage (VGS = 0) |
500 |
V |
|
VDGR |
Drain- gate Voltage (RGS = 20 k) |
500 |
V |
|
VGS |
Gate-source Voltage |
±30 |
V |
|
ID |
Drain Current (continuous) at Tc = 25 |
8.6 |
A |
|
ID |
Drain Current (continuous) at Tc = 100 |
5.4 |
A |
|
IDM(•) |
Drain Current (pulsed) |
34.4 |
A |
|
Ptot |
Total Dissipation at Tc = 25 |
125 |
W |
| Derating Factor |
1 |
W/ | |
|
dv/dt (1) |
Peak Diode Recovery voltage slope |
4.5 |
V/ns |
|
VISO |
Insulat ion Withstand Voltage (DC) |
- |
|
|
Tstg |
Storage Temperature |
-65 to +150 |
|
|
Tj |
Max. Operating Junction Temperature |
150 |
|
TYPE |
VDSS |
RDS(on) |
ID |
| STP9NB50 |
500 V |
< 0.85 |
8.6 A |
Using the latest high voltage MESH OVERLAY] process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company's proprieraty edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics.
|
Symbol |
Parameter |
Value |
Units |
|
VDS |
Drain-source Voltage (VGS = 0) |
500 |
V |
|
VDGR |
Drain- gate Voltage (RGS = 20 k) |
500 |
V |
|
VGS |
Gate-source Voltage |
±30 |
V |
|
ID |
Drain Current (continuous) at Tc = 25 |
4.9 |
A |
|
ID |
Drain Current (continuous) at Tc = 100 |
3.1 |
A |
|
IDM(•) |
Drain Current (pulsed) |
34.4 |
A |
|
Ptot |
Total Dissipation at Tc = 25 |
40 |
W |
| Derating Factor |
0.32 |
W/ | |
|
dv/dt (1) |
Peak Diode Recovery voltage slope |
4.5 |
V/ns |
|
VISO |
Insulat ion Withstand Voltage (DC) |
2000 |
|
|
Tstg |
Storage Temperature |
-65 to +150 |
|
|
Tj |
Max. Operating Junction Temperature |
150 |
|
TYPE |
VDSS |
RDS(on) |
ID |
| STP9NB50FP |
500 V |
< 0.85 |
4.9 A |
