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SUM110N1009, SUM110N10-09-E3, SUM110P04-05

SUM110N1009, SUM110N10-09-E3, SUM110P04-05 Selling Leads, Datasheet

MFG:VISHAY  Package Cooled:05+  D/C:800/REEL

SUM110N1009, SUM110N10-09-E3, SUM110P04-05 Picture

SUM110N1009, SUM110N10-09-E3, SUM110P04-05 Datasheet download

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Part Number: SUM110N1009

 

MFG: VISHAY

Package Cooled: 05+

D/C: 800/REEL

 

 

 
 
 
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About SUM09MN20-270

PDF/DataSheet Download

Datasheet: SUM09MN20-270

File Size: 40516 KB

Manufacturer: VISAY [Vishay Siliconix]

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SUM110N10-09-E3 Suppliers

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About SUM110N10-09-E3

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Datasheet: SUM110N10-09-E3

File Size: 64702 KB

Manufacturer: VISAY [Vishay Siliconix]

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About SUM110P04-05

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Datasheet: SUM110P04-05

File Size: 197707 KB

Manufacturer: Vishay Siliconix

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SUM110P04-05 General Description

The attached spice model describes the typical electrical characteristics of the p-channel vertical DMOS.  The subcircuit model is extracted and optimized over the  −55 to 125°C temperature ranges under the pulsed 0-V to 10-V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage.

A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model.  All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device.

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