MFG:TOSH Package Cooled:SOP16 D/C:08+/09+
TC4W66FU TSSOP8-4W66, TC4W66FU(TE12L) SSOP8, TC500 Datasheet download
MFG: TOSH
Package Cooled: SOP16
D/C: 08+/09+
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Datasheet: TC4001
File Size: 197001 KB
Manufacturer: TOSHIBA [Toshiba Semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: TC4001
File Size: 197001 KB
Manufacturer: TOSHIBA [Toshiba Semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: TC500
File Size: 578595 KB
Manufacturer: MICROCHIP [Microchip Technology]
Download : Click here to Download
TheTC500/A/510/514 family are precision analog front ends that implement dual slope A/D converters having a maximum resolution of 17-bits plus sign. As a minimum, each device contains the integrator, zero crossing
comparator and processor interface logic. The TC500 is the base (16-bit max) device and requires both positive and negative power supplies. The TC500A is identical to the TC500 with the exception that it has improved linearity, allowing it to operate to a maximum resolution of 17-bits. The TC510 adds an onboard negative power supply converter for single supply operation. The TC514 adds both a negative power supply converter and a 4 input differential analog multiplexer.
Each device has the same processor control interface consisting of 3 wires: control inputs (A and B) and zerocrossing
comparator output (CMPTR). The processor manipulates A, B to sequence the TC5XX through four phases of conversion: Auto Zero, Integrate, De-integrate and Integrator Zero. During the Auto Zero phase, offset voltages in the TC5XX are corrected by a closed loop feedback mechanism. The input voltage is applied to the integrator during the Integrate phase. This causes an integrator output dv/dt directly proportional to the magnitude of the input voltage. The higher the input voltage, the greater the magnitude of the voltage stored on the integrator during this phase. At the start of the De-integrate phase, an external voltage reference is applied to the integrator and, at the same time, the external host processor starts its on-board timer. The processor maintains this state until a transition
occurs on the CMPTR output, at which time the processor halts its timer. The resulting timer count is the converted
analog data. Integrator Zero (the final phase of conversion) removes any residue remaining in the integrator in preparation for the next conversion.
The TC500/A/510/514 offer high resolution (up to 17- bits), superior 50Hz/60Hz noise rejection, low power operation, minimum I/O connections, low input bias currents and lower cost compared to other converter technologies having similar conversion speeds.
TC510/TC514 Positive Supply Voltage
(VDD to GND) .........................................+10.5V
TC500/TC500A Supply Voltage
(VDD to VSS) ..................................................................+18V
TC500/TC500A Positive Supply Voltage
(VDD to GND) .................................................................+12V
TC500/TC500A Negative Supply Voltage
(VSS to GND)......................................................................-8V
Analog Input Voltage (VIN+ or VIN-) ..........................VDD to VSS
Logic Input Voltage..............................VDD +0.3V to GND - 0.3V
Voltage on OSC:................ -0.3V to (VDD +0.3V) for VDD < 5.5V
Ambient Operating Temperature Range:................ 0 to +70
Storage Temperature Range:............................ -65 to +150
*Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.
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