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TDA10046HT, TDA10046HT/C, TDA10046HT/C1

Table of contents:
Info of TDA10046HT
Info of TDA10046HT/C
Info of TDA10046HT/C1

TDA10046HT, TDA10046HT/C, TDA10046HT/C1 Selling Leads, Datasheet

MFG:PHILIPS Package Cooled:TQFP64 D/C:05+

TDA10046HT, TDA10046HT/C, TDA10046HT/C1 Picture

TDA10046HT, TDA10046HT/C, TDA10046HT/C1 Datasheet download

Five Points

Part Number: TDA10046HT

MFG: PHILIPS

Package Cooled: TQFP64

D/C: 05+

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TDA10046HT General Description

The TDA10046HT performs all DVB-T channel decoding functions from IF input to transport stream output, using an internal DSP core for synchronization and control.Thanks to its sharp adjacent channel digital ilter, this single-chip receiver achieves excellent performance with low cost tuners (one SAW only). It requires only a low cost crystal oscillator (4 MHz) as a clock source, which can be shared with the tuner.

After sampling of the 1st or 2nd IF by a 10-bit ADC, the signal is converted to baseband and passes through the FFT demodulator. Channel frequency response is then estimated and iltered in both time and frequency domains, and used to equalize the signal.

A common phase error correction handles tuner phase noise.

The TDA10046HT implements a number of advanced features including a high-performance 'Pulse Killer' algorithm to reduce the disturbing effectsof short and strong impulsive noise interference caused by electrical domestic devices and/or car trafic. For maximum ease of use, theTDA10046HT features fully automatic transmission parameters detection,ultra fast scan of the whole UHF/VHF band, and fast zapping facilities.

Evaluation boards are available with most commercial tuners.They areprovided with all the necessary software including a tailored GraphicalUser Interface (GUI) that allows easy evaluation and development.

TDA10046HT Features

• 2K and 8K COFDM demodulator, fully ETS 300-744 compliant
• TPS and Cell Identiier I C-bus readable
• 2nd or 1st IF analog input
• On chip 10-bit ADC and PLL
• Single or dual AGC loop (with programmable takeover point)
• Adjacent channel digital iltering (only one external SAW ilter is required)
• Automatic frequency offset detection (±1, 2 or 3 standard offsets)
• Dynamic FFT window positioning, and adaptive echo equalization
• Consolidated algorithm for impulsive noise reduction
• DSP based synchronization enables on the ly irmware upgrades
• No extra-host software required
• Fast UHF/VHF band scanning
• Simultaneous tri-state parallel and serial Transport Stream interfaces
• 4 GPIO pins with
• I²C-bus interface
• 5V tolerant I/O pins
• Low power consumption (450mW)
• TQFP64 package, CMOS 0.18 m technology

TDA10046HT Typical Application

·Integrated Digital TV (iDTV)
·Set-Top-Boxes (STB)
·Personal Video Recorder (PVR) with DVB-T reception
·Digital TV PCI card for Personal Computers

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