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U6218B, U6219B-AFPG3, U62256

Table of contents:
Info of U6218B
Info of U6219B-AFPG3
Info of U62256

U6218B, U6219B-AFPG3, U62256 Selling Leads, Datasheet

MFG:TFK Package Cooled:32150+ D/C:500

U6218B, U6219B-AFPG3, U62256 Datasheet download

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Part Number: U6218B

MFG: TFK

Package Cooled: 32150+

D/C: 500

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U62256 General Description

The U62256 is a static RAM manufactured using a CMOS process technology with the following operating modes:
- Read - Standby
- Write - Data Retention
The memory array is based on a MIXMOS cell.

The circuit is activated by the falling edge of E. The address and control inputs open simultaneously.According to the information of W and G, the data inputs, or outputs,are active. In a Read cycle, the data outputs are activated by the falling edge of G, afterwards the data word read will be available at the outputs DQ0-DQ7. After the address change, the data outputs go High-Z until the new information read is available. The data outputs have not preferred state.

The Read cycle is finished by the falling edge of W, or by the rising edge of E, respectively.Data retention is guaranteed down to 2 V. With the exception of E, all inputs consist of NOR gates, so that no pull-up/pull-down resistors are required.

U62256 Maximum Ratings

Absolute Maximum Ratings ^a	Symbol	Min.	Max.	Unit
Power Supply Voltage	V_CC	-0.5	7	V
Input Voltage	V_I	-0.5	V_CC+0.5^b	V
Output Voltage	V_O	-0.5	V_CC+0.5^b	V
Power Dissipation	P_D	-	1	W
Operating Temperature C-Type K-Type	T_a	0 -40	70 85	°C
Storage Temperature	T_stg	-65	125	°C
Output Short-Circuit Current at V_CC= 5 V and V_O= 0 V^c	\| I_OS \|		200	mA

a Stresses greater than those listed under „Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at condition above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability

b Maximum voltage is 7 V

c Not more than 1 output should be shorted at the same time. Duration of the short circuit should not exceed 30 s.

U62256 Features

· 32768x8 bit static CMOS RAM
· Access times 70 ns, 100 ns
· Common data inputs and data outputs
· Three-state outputs
· Typ. operating supply current
                            70 ns: 50 mA
                          100 ns: 40 mA
· TTL/CMOS-compatible
· Automatical reduction of power dissipation in long Read Cycles
· Power supply voltage 5 V ± 10 %
· Operating temperature ranges
                                    0 to 70 °C
                                 -40 to 85 °C
· CECC 90000 Quality Standard
· ESD protection > 2000 V (MIL STD 883C M3015.7)
· Latch-up immunity >100 mA
· Package: SOP28 (330 mil)

U62256 Connection Diagram

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