Design Your Own IC--Part 2: CPLDs in practice （1）

Published:2011/8/3 3:08:00 Author:Li xiao na From:SeekIC

By Paul Goossens

Following the description of the hardware in last month’s issue (Part 1), it’s now time to start working with the experimenter’s board. We assume that you have already installed the Altera software and read the tutorial.



Designing digital circuits usually amounts to repeatedly breaking down the problem into sub problems until you finally arrive at a design consisting of variety of basic logic functions. Based on this, you can develop the electronic circuit and, if necessary, a printed circuit board.

Descriptive languages

Designing digital logic circuitry is easier if you use a descriptive language. The purpose of such a language is to allow specific functions to be described (hence the name). A descriptive language allows intelligent software to be used to design an electronic circuit that meets the description specified by the designer. There are presently several different descriptive languages. Two of them are manufacturer-independent and are supported by a large number of manufacturers: Verilog and VHDL. In this article, we use Verilog as our descriptive language.

Verilog

We chose Verilog because it is somewhat clearer than VHDL. However, the two languages are the same in many aspects. The biggest difference between them is in how the descriptions are formulated. This means that many of the considerations, pitfalls and the like described in this article are also directly applicable to VHDL. It’s possible to generate hierarchical designs using Verilog. This means that the design can be divided into smaller designs. These smaller ’subdesigns’ can in turn be further divided into various subdesigns as necessary. In Verilog parlance, such subdesigns are called ’modules’.

Dividing a design into several modules has the beneficial side effect that it may be possible to reuse the modules in other designs. A counter is an example of a type of module that is used relatively often, so it is definitely a good idea to put a counter into a separate module.

Example I

The best way to leam something is by actually doing it. Consequently, we can begin right away with an example. Before you can get started, you must download the examples from the Elektor Electronics Internet site (www.elektor-electronics.co.uk). The examples are located under item number 030385-11 for the June articles. All you have to do is unpack the Zip file. Example 1 can be found in the Exl folder. Just double-click on the exl.quartus file, and the design software will start up automatically. In the schematic diagram that is displayed, you can see that the various I/O pins of the IC are connected to a block in which several signals are listed. These signals are the inputs and outputs of this block.

As you have already seen in the tutorial (you did look at the tutorial, didn’t you?), you can view the associated source code by double-clicking on the block. In this case, the source code is written in the Verilog language. The text shown in green is all comments as far as Verilog is concerned, so it has no effect on the ultimate result. However, Quartus uses these lines to store information, so it’s a good idea to leave them as they are.

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