Design Your Own IC--Part 2: CPLDs in practice （3）

Published:2011/8/3 22:40:00 Author:Li xiao na From:SeekIC

By Paul Goossens

Programming

As already mentioned in Part 1 of this article, to program the CPLD you will need the JTAG programmer described in the September 2002 issue of Elektor Electronics. Of course, an original Altera ByteBlaster is also OK. We assume that your programmer is connected to the printer port of the PC and the JTAG connector is attached to connector K2 of the experimenter’s board. Now switch on the power for the experimenter’s board.

In Quartus, first select the Tools menu and then Programmer. A new window will appear. Check that the programmer is set to JTAG’ and the correct interface (ByteBlaster) is selected.

In this window, there is a line that has ’EPM7128SLCM’ in the Device column. On the same line, the programming file exl.pof is shown in the File column. Everything is now ready for programming the CPLD. You must tell the program you want to program this IC by placing a tick mark under the Program/Configure column.

Finally, click on the Start Programming button, which is located at the very top and looks like a sort of ’Play’ button.

Testing

After being programmed, the CPLD is immediately active, which means that the programmed design can be used right away. Make sure that jumpers JP1 and JP2 are fitted.

Checking the design is easy. LED Dl should only be on if all of the switches are in the ’1’ position. In all other cases, the LED must be dark. By contrast, LED D4 should do just the opposite. That means that if Dl is on, D4 must be off, and vice versa.

We have described D2 as an OR function, which means that this LED must be on if one or more switches are in the ’1’ position.

LED D3 must light up whenever SI and S2 are both in the ’1’ state OR S3 and S4 are both in the 1’ state. These functions can be easily checked using the switches.

Now try to modify the design in Quartus to cause LED Dl to be on whenever SI is in the T state and S2 is in the ’0’ state. The states of the other switches don’t matter. Good luck with your design!

Example 2

As already mentioned, Example 1 is very simple. The special power of Verilog is that it allows designers to develop designs in a more descriptive manner. Boolean algebra can occasionally be handy in Verilog, but it is certainly not the intention that relatively complex designs must be entered entirely in Boolean algebra.

This can be demonstrated using Example 2, in which we set about designing two flip-flops and a latch.

The files for Example 2 can be found in the ex2 folder. In this folder, open ex2.quartus, and the program will automatically open all of the other necessary files.

In the schematic diagram (ex2.bdf), you can see that switches S1-S4 are connected to a functional block named flipflop. SI is connected to the CLK input, etc. Double-click on the block to open the associated Verilog source code.

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