54AC74

PinoutSpecificationsTemperature Min-55 deg CTemperature Max125 deg C View Using CatalogDescriptionThe 54AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q#) outputs. Information at the input is transferred to the outputs on the positive edge of the clock...

product image

54AC74 Picture
SeekIC No. : 004233117 Detail

54AC74: PinoutSpecificationsTemperature Min-55 deg CTemperature Max125 deg C View Using CatalogDescriptionThe 54AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q...

floor Price/Ceiling Price

Part Number:
54AC74
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2024/5/7

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Pinout




Specifications

Temperature Min-55 deg C
Temperature Max125 deg C
View Using Catalog



Description

The 54AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q#) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input of 54AC74 is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

54AC74 Asynchronous Inputs:

LOW input to S#D (Set) sets Q to HIGH level

LOW input to C#D (Clear) sets Q to LOW level

Clear and Set are independent of clock

Simultaneous LOW on C#D and S#D makes both Q and Q#

HIGH

Application Notes


Title Size in Kbytes Date
AN-925: Radiation Design Test Data for Advanced CMOS Product 194 Kbytes 5-Aug-95 Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
Optical Inspection Equipment
Connectors, Interconnects
Semiconductor Modules
Prototyping Products
DE1
Isolators
Memory Cards, Modules
View more