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Part Number: 54HC4050

 

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Description: Maxwell Technologies' 54HC4050 high speed CMOS Logic Hex Non-Inverting Buffers features a greater than...


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54HC4050 General Description


Maxwell Technologies' 54HC4050 high speed CMOS Logic Hex Non-Inverting Buffers features a greater than 100 krad(Si) total dose tolerance, depending upon space mission. These parts have a modified input protection structure that enables them to be used as logic level translators which will convert high-level logic to a low-level logic while operating off the lowlevel logic supply. For example, 15V input pulse levels can be down-converted to 0V to 5V logic levels. The modified input protection structure protects the input from negative electrostatic discharge. The 54HC4050 can be used as simple buffers or inverters without level translation.

Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Class S.

54HC4050 Maximum Ratings

PARAMETER SYMBOL MIN MAX UNIT
Storage Temperature TS -65 150
Operating Temperature Range TA -55 125
DC Supply Voltage VCC -0.5 7.0 V
DC Input Diode Current
For VI < -0.5V or VI > VCC +0.5V
IIK -20 +20 mA
DC Output Diode Current
For VO < -0.5V or VO > VCC +0.5V
IOK -20 +20 mA
DC Output Source or Sink Current per Output Pin
For VO > -0.5V or VO < VCC +0.5V
IO -25 +25 mA
DC VCC or Ground Current ICC or IGND -50 +50 mA

54HC4050 Features

• High speed CMOS logic hex non-inverting buffers
• RAD-PAK® radiation hardened against natural space radiation
• Single Event Effects:
   - SEL: > 120 MeV/mg/cm2
• Total dose hardness:
• - > 100 Krad (Si), depending upon space mission
• Package:
   -16 Pin RAD-PAK® Flat Pack
• Typical propagation delay:
   - 6ns at VCC = 5V, CL = 15pF, TA = 25
• High-to-Low voltage level converter for up to VI = 16V
• Fanout (over temperature range)
   -10 LSTTL loads (Standard Outputs)
   -15 LSTTL loads (Bus Driver Outputs)
• Balanced propagation delay and transition times
• Significant power reduction compared to LSTTL logic ICs
• 2V to 6V operation
• High noise immunity
• -NIL = 30%, NIH = 30% of VCC at VCC = 5V

54HC4050 Connection Diagram

54HC4050  Connection Diagram

54HC4050 datasheet

54HC4050
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