54LVTH16373

Features:

* 3.3V low voltage advanced BiCMOS technology (LVT) 16- bit transparent D-type latches with 3-state outputs
* Total dose hardness: - > 100 krad (Si), dependent upon space mission
* Single event effect: 2 - SEL  : No LU > 119 MeV/mg/cm TH
* Package: 48 pin RAD-PAK(R) flat package
* Operating temperature range: - 55 to 125°C
* Distributed V_CC  and GND pin configuration minimizes high- speed switching noise
* Supports mixed-mode signal operation - 5V input and output voltages with 3.3V V_CC
* Supports unregulated battery operation down to 2.7V
* Typical V_OLP   (output ground bounce) < 0.8V at V_CC =3.3V,  T_A =25°C
* Latch-up performance exceeds 500mA per JEDEC stan- dard
* Supports live insertion
* Bus-hold data inputs eliminate the need for external pullup  resistors 


Pinout




Specifications

PARAMETER	SYMBOL	MIN	MAX	UNIT
Supply voltage range	VCC	-0.5	4.6	V
Input voltage range 1	VI	-0.5	7	V
Voltage range applied to any output in the high state or power-off state 1	VO	-0.5	7	V
Current into any output in the low state	IO	--	96	mA
Current into any output in the high state2	IO	--	48	mA
Input clamp current (VI < 0)	IIK	--	-50	mA
Output clamp current (VO < O)	I OK	--	-50	mA
Maximum power dissipation at TA = 55°C3	PD	--	0.85	mW
Storage temperature range	TS	-65	150	°C

Description

Maxwell Technologies' 54LVTH16373 16-bit transparent D- type latches with 3-state output features a greater than 100 krad (Si) total dose tolerance, dependent upon space mission. The 54LVTH16373 is designed for low voltage (3.3V) V_CC operation, but with the capability to provide a TTL interface toa 5V system environment. It is suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working reg- isters. The 54LVTH16373 can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is low, the Q output are latched at the levels set up at the data (D) inputs.

When LE is high, the Q outputs of 54LVTH16373 follow the D inputs. A buffered output-enable (OE) input can be used to place the eight out- puts in either a normal logic state or a high impedance state. In the high impedance state, the outputs neither load nor drive the bus lines significantly. The high impedance state and the increased drive provide the capability to drive bus lines with- out the need for interface or pullup components. OE of 54LVTH16373 does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high impedance state.

Maxwell Technologies' patented RAD-PAK(R) packaging technol- ogy of 54LVTH16373 incorporates radiation shielding in the microcircuit package.  It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission.  In a GEO orbit, RAD-PAK provides greater than 100 krad (Si) radiation dose tolerance. This 54LVTH16373 is available with screening up to Class S.