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Part Number: 74AC377
Description: The AC/ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The ...
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74AC377
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DataSheet
General Description
74AC377 General Description
The AC/ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.
The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's Q output. The CE input must be stable only one setup time prior to the LOW-to-HIGH clock transition for predictable operation.
74AC377 Maximum Ratings
Supply Voltage (VCC) -0.5V to +7.0V
DC Input Diode Current (IIK)
VI = -0.5V -20 mA
VI = VCC + 0.5V +20 mA
DC Input Voltage (VI) -0.5V to VCC + 0.5V
DC Output Diode Current (IOK)
VO = -0.5V -20 mA
VO = VCC + 0.5V +20 mA
DC Output Voltage (VO) -0.5V to VCC + 0.5V
DC Output Source
or Sink Current (IO) ±50 mA
DC VCC or Ground Current
per Output Pin (ICC or IGND) ±50 mA
Storage Temperature (TSTG) -65 to -150
Junction Temperature (TJ)
PDIP 140
DC Input Diode Current (IIK)
VI = -0.5V -20 mA
VI = VCC + 0.5V +20 mA
DC Input Voltage (VI) -0.5V to VCC + 0.5V
DC Output Diode Current (IOK)
VO = -0.5V -20 mA
VO = VCC + 0.5V +20 mA
DC Output Voltage (VO) -0.5V to VCC + 0.5V
DC Output Source
or Sink Current (IO) ±50 mA
DC VCC or Ground Current
per Output Pin (ICC or IGND) ±50 mA
Storage Temperature (TSTG) -65 to -150
Junction Temperature (TJ)
PDIP 140
74AC377 Features
· ICC reduced by 50%
· Ideal for addressable register applications
· Clock enable for address and data synchronization applications
· Eight edge-triggered D-type flip-flops
· Buffered common clock
· Outputs source/sink 24 mA
· See 273 for master reset version
· See 373 for transparent latch version
· See 374 for 3-STATE version
· ACT377 has TTL-compatible inputs
· Ideal for addressable register applications
· Clock enable for address and data synchronization applications
· Eight edge-triggered D-type flip-flops
· Buffered common clock
· Outputs source/sink 24 mA
· See 273 for master reset version
· See 373 for transparent latch version
· See 374 for 3-STATE version
· ACT377 has TTL-compatible inputs
74AC377
PDF/DataSheet Download
- Datasheet: 74AC377
- File Size: 104102 KB
- Manufacturer:
- Click here to Download
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