74ACT16952

Features: ` Members of the Texas Instruments Widebus™ Family` Inputs Are TTL-Voltage Compatible` Noninverting Outputs` Two 16-Bit, Back-to-Back Registers Store Data Flowing in Both Directions` Flow-Through Architecture Optimizes PCB Layout` Distributed VCC and GND Pin Configuration Minimizes...

product image

74ACT16952 Picture
SeekIC No. : 004249044 Detail

74ACT16952: Features: ` Members of the Texas Instruments Widebus™ Family` Inputs Are TTL-Voltage Compatible` Noninverting Outputs` Two 16-Bit, Back-to-Back Registers Store Data Flowing in Both Directions`...

floor Price/Ceiling Price

Part Number:
74ACT16952
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2024/4/29

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

` Members of the Texas Instruments Widebus™ Family
` Inputs Are TTL-Voltage Compatible
` Noninverting Outputs
` Two 16-Bit, Back-to-Back Registers Store
    Data Flowing in Both Directions
` Flow-Through Architecture Optimizes PCB Layout
` Distributed VCC and GND Pin Configuration
    Minimizes High-Speed Switching Noise
` EPIC™ (Enhanced-Performance Implanted CMOS) 1-m Process
` 500-mA Typical Latch-Up Immunity at 125°C
` Package Options Include Plastic 300-mil
    Shrink Small-Outline (DL) Packages Using
    25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD)
    Packages Using 25-mil Center-to-Center Pin Spacings



Pinout

  Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±400 mA
Maximum package power dissipation at TA = 55°C (in still air) (see Note 2): DL package . . . . 1.4 W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65°C to 150°C

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated onditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings re observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150 and a board trace length of 750 mils.



Description

The 74ACT16952 are 16-bit registered transceivers that contain two sets of D-type flip-flops for temporary storage of data flowing in either direction. They can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is stored in registers on the low-to-high transition of the clock (CLKAB or CLKBA) input, provided that the clock-enable (CEAB or CEBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data on either port. To avoid false clocking of the flip-flops, CEAB (or CEBA) should not be switched from low to high while CLKAB (or CLKBA) is low.

The 74ACT16952 is packaged in TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The 74ACT16952 is characterized for operation over the full military temperature range of 55°C to 125°C. The 74ACT16952 is characterized for operation from 40°C to 85°C.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
Line Protection, Backups
Power Supplies - External/Internal (Off-Board)
Circuit Protection
Memory Cards, Modules
RF and RFID
Optoelectronics
View more